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From: Ross Lagerwall <ross.lagerwall@citrix.com>
To: Xen-devel <xen-devel@lists.xen.org>
Cc: Keir Fraser <keir@xen.org>, Jan Beulich <jbeulich@suse.com>
Subject: [PATCH 2/2] mwait_idle: Broadwell support
Date: Mon, 8 Sep 2014 13:42:07 +0100	[thread overview]
Message-ID: <1410180127-4812-2-git-send-email-ross.lagerwall@citrix.com> (raw)
In-Reply-To: <1410180127-4812-1-git-send-email-ross.lagerwall@citrix.com>

From: Len Brown <len.brown@intel.com>

Broadwell (BDW) is similar to Haswell (HSW), the preceding processor generation.

Currently, the only difference in their C-state tables is that PC3 max exit latency
is 33usec on HSW and 40usec on BDW.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
---
 xen/arch/x86/cpu/mwait-idle.c | 60 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index 2c5864e..4d5d31d 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -398,6 +398,58 @@ static const struct cpuidle_state hsw_cstates[] = {
 	{}
 };
 
+static struct cpuidle_state bdw_cstates[] = {
+	{
+		.name = "C1-BDW",
+		.flags = MWAIT2flg(0x00),
+		.exit_latency = 2,
+		.target_residency = 2,
+        },
+	{
+		.name = "C1E-BDW",
+		.flags = MWAIT2flg(0x01),
+		.exit_latency = 10,
+		.target_residency = 20,
+        },
+	{
+		.name = "C3-BDW",
+		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 40,
+		.target_residency = 100,
+        },
+	{
+		.name = "C6-BDW",
+		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 133,
+		.target_residency = 400,
+        },
+	{
+		.name = "C7s-BDW",
+		.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 166,
+		.target_residency = 500,
+        },
+	{
+		.name = "C8-BDW",
+		.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 300,
+		.target_residency = 900,
+        },
+	{
+		.name = "C9-BDW",
+		.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 600,
+		.target_residency = 1800,
+        },
+	{
+		.name = "C10-BDW",
+		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 2600,
+		.target_residency = 7700,
+        },
+        {}
+};
+
 static const struct cpuidle_state atom_cstates[] = {
 	{
 		.name = "C1E-ATM",
@@ -588,6 +640,11 @@ static const struct idle_cpu idle_cpu_hsw = {
 	.disable_promotion_to_c1e = 1,
 };
 
+static const struct idle_cpu idle_cpu_bdw = {
+	.state_table = bdw_cstates,
+	.disable_promotion_to_c1e = 1,
+};
+
 static const struct idle_cpu idle_cpu_avn = {
 	.state_table = avn_cstates,
 	.disable_promotion_to_c1e = 1,
@@ -619,6 +676,9 @@ static struct intel_idle_id {
 	ICPU(0x45, hsw),
 	ICPU(0x46, hsw),
 	ICPU(0x4d, avn),
+	ICPU(0x3d, bdw),
+	ICPU(0x4f, bdw),
+	ICPU(0x56, bdw),
 	{}
 };
 
-- 
1.9.3

  reply	other threads:[~2014-09-08 12:42 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-08 12:42 [PATCH 1/2] mwait_idle: Disable Baytrail Core and Module C6 auto-demotion Ross Lagerwall
2014-09-08 12:42 ` Ross Lagerwall [this message]
2014-09-08 13:24   ` [PATCH 2/2] mwait_idle: Broadwell support Jan Beulich
2014-10-16 12:54   ` Chen, Tiejun
2014-10-16 14:06     ` Jan Beulich
2014-10-17  1:22       ` Chen, Tiejun
2014-10-17  8:40         ` Jan Beulich
2014-10-24  3:02           ` Chen, Tiejun
2014-10-17  1:00     ` Chen, Tiejun
2014-09-08 13:22 ` [PATCH 1/2] mwait_idle: Disable Baytrail Core and Module C6 auto-demotion Jan Beulich
2014-09-08 14:02   ` Ross Lagerwall
2014-09-08 14:20     ` Jan Beulich

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