From: Ian Campbell <ian.campbell@citrix.com>
To: xen-devel@lists.xen.org
Cc: julien.grall@linaro.org, tim@xen.org,
Ian Campbell <ian.campbell@citrix.com>,
stefano.stabellini@eu.citrix.com
Subject: [PATCH 1/9] xen: arm: Correct PMXEV cp register definitions
Date: Tue, 9 Sep 2014 17:23:00 +0100 [thread overview]
Message-ID: <1410279788-27167-1-git-send-email-ian.campbell@citrix.com> (raw)
In-Reply-To: <1410279730.8217.238.camel@kazak.uk.xensource.com>
p15,0,c9,c13,1 is PMXEVTYPER not PMXEVCNTR.
p15,0,c9,c13,2 is PMXEVCNTR not PMXEVCNR.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/arch/arm/traps.c | 2 +-
xen/include/asm-arm/cpregs.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 019991f..c838b70 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1514,8 +1514,8 @@ static void do_cp15_32(struct cpu_user_regs *regs,
case HSR_CPREG32(PMCEID0):
case HSR_CPREG32(PMCEID1):
case HSR_CPREG32(PMCCNTR):
+ case HSR_CPREG32(PMXEVTYPER):
case HSR_CPREG32(PMXEVCNTR):
- case HSR_CPREG32(PMXEVCNR):
case HSR_CPREG32(PMUSERENR):
case HSR_CPREG32(PMINTENSET):
case HSR_CPREG32(PMINTENCLR):
diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h
index f1100c8..afe9148 100644
--- a/xen/include/asm-arm/cpregs.h
+++ b/xen/include/asm-arm/cpregs.h
@@ -222,8 +222,8 @@
#define PMCEID0 p15,0,c9,c12,6 /* Perf. Mon. Common Event Identification register 0 */
#define PMCEID1 p15,0,c9,c12,7 /* Perf. Mon. Common Event Identification register 1 */
#define PMCCNTR p15,0,c9,c13,0 /* Perf. Mon. Cycle Count Register */
-#define PMXEVCNTR p15,0,c9,c13,1 /* Perf. Mon. Event Type Select Register */
-#define PMXEVCNR p15,0,c9,c13,2 /* Perf. Mon. Event Count Register */
+#define PMXEVTYPER p15,0,c9,c13,1 /* Perf. Mon. Event Type Select Register */
+#define PMXEVCNTR p15,0,c9,c13,2 /* Perf. Mon. Event Count Register */
#define PMUSERENR p15,0,c9,c14,0 /* Perf. Mon. User Enable Register */
#define PMINTENSET p15,0,c9,c14,1 /* Perf. Mon. Interrupt Enable Set Register */
#define PMINTENCLR p15,0,c9,c14,2 /* Perf. Mon. Interrupt Enable Clear Register */
--
1.7.10.4
next prev parent reply other threads:[~2014-09-09 16:23 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-09 16:22 [RFC PATCH 0/9] xen: arm: reenable support for 32-bit userspace running in 64-bit guest Ian Campbell
2014-09-09 16:23 ` Ian Campbell [this message]
2014-09-09 23:04 ` [PATCH 1/9] xen: arm: Correct PMXEV cp register definitions Julien Grall
2014-09-09 16:23 ` [PATCH 2/9] xen: arm: Factor out psr_mode_is_user Ian Campbell
2014-09-09 23:08 ` Julien Grall
2014-09-09 16:23 ` [PATCH 3/9] xen: arm: Handle 32-bit EL0 on 64-bit EL1 when advancing PC after trap Ian Campbell
2014-09-09 23:12 ` Julien Grall
2014-09-09 16:23 ` [PATCH 4/9] xen: arm: turn vtimer traps for cp32/64 and sysreg into #undef Ian Campbell
2014-09-09 23:31 ` Julien Grall
2014-09-10 9:46 ` Ian Campbell
2014-09-10 18:54 ` Julien Grall
2014-09-11 8:43 ` Ian Campbell
2015-01-14 16:33 ` Ian Campbell
2015-01-14 16:57 ` Julien Grall
2015-01-15 10:26 ` Ian Campbell
2015-01-15 12:27 ` Julien Grall
2015-01-15 12:35 ` Ian Campbell
2014-09-09 16:23 ` [PATCH 5/9] xen: arm: Handle CP15 register traps from userspace Ian Campbell
2014-09-09 23:42 ` Julien Grall
2014-09-10 9:48 ` Ian Campbell
2014-09-10 18:56 ` Julien Grall
2014-09-18 1:31 ` Ian Campbell
2014-09-09 16:23 ` [PATCH 6/9] xen: arm: Handle CP14 32-bit register accesses " Ian Campbell
2014-09-09 23:45 ` Julien Grall
2014-09-10 9:48 ` Ian Campbell
2015-02-10 3:40 ` Ian Campbell
2015-02-10 4:14 ` Julien Grall
2014-09-09 16:23 ` [PATCH 7/9] xen: arm: correctly handle sysreg " Ian Campbell
2014-09-09 16:23 ` [PATCH 8/9] xen: arm: handle remaining traps " Ian Campbell
2014-09-09 16:23 ` [PATCH 9/9] xen: arm: Allow traps from 32 bit userspace on 64 bit hypervisors again Ian Campbell
2014-09-09 16:23 ` [RFC PATCH 0/9] xen: arm: reenable support for 32-bit userspace running in 64-bit guest Ian Campbell
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