From mboxrd@z Thu Jan 1 00:00:00 1970 From: vijay.kilari@gmail.com Subject: [RFC PATCH] xen/arm: Restricted access to IFSR32_EL2 and FPEXC32_EL2 Date: Thu, 18 Sep 2014 17:43:48 +0530 Message-ID: <1411042429-17108-3-git-send-email-vijay.kilari@gmail.com> References: <1411042429-17108-1-git-send-email-vijay.kilari@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1411042429-17108-1-git-send-email-vijay.kilari@gmail.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian.Campbell@citrix.com, julien.grall@linaro.org, stefano.stabellini@eu.citrix.com, stefano.stabellini@citrix.com, tim@xen.org, xen-devel@lists.xen.org Cc: Prasun.Kapoor@caviumnetworks.com, Vijaya Kumar K , manish.jaggi@caviumnetworks.com, vijay.kilari@gmail.com List-Id: xen-devel@lists.xenproject.org From: Vijaya Kumar K IFSR32_EL1 and FPEXC32_EL1 registers are accessible in aarch64 mode only if aarch32 mode is support in EL1. So allow access ti these registers only for 32-bit domains. Signed-off-by: Vijaya Kumar K --- xen/arch/arm/arm64/vfp.c | 6 ++++-- xen/arch/arm/traps.c | 4 +++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/arm64/vfp.c b/xen/arch/arm/arm64/vfp.c index 3cd2b1b..999a0d5 100644 --- a/xen/arch/arm/arm64/vfp.c +++ b/xen/arch/arm/arm64/vfp.c @@ -28,7 +28,8 @@ void vfp_save_state(struct vcpu *v) v->arch.vfp.fpsr = READ_SYSREG32(FPSR); v->arch.vfp.fpcr = READ_SYSREG32(FPCR); - v->arch.vfp.fpexc32_el2 = READ_SYSREG32(FPEXC32_EL2); + if ( is_32bit_domain(v->domain) ) + v->arch.vfp.fpexc32_el2 = READ_SYSREG32(FPEXC32_EL2); } void vfp_restore_state(struct vcpu *v) @@ -56,5 +57,6 @@ void vfp_restore_state(struct vcpu *v) WRITE_SYSREG32(v->arch.vfp.fpsr, FPSR); WRITE_SYSREG32(v->arch.vfp.fpcr, FPCR); - WRITE_SYSREG32(v->arch.vfp.fpexc32_el2, FPEXC32_EL2); + if ( is_32bit_domain(v->domain) ) + WRITE_SYSREG32(v->arch.vfp.fpexc32_el2, FPEXC32_EL2); } diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 25fa8a0..cda0523 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -37,6 +37,7 @@ #include #include #include +#include #include "decode.h" #include "vtimer.h" @@ -789,7 +790,8 @@ void show_registers(struct cpu_user_regs *regs) #else ctxt.far = READ_SYSREG(FAR_EL1); ctxt.esr_el1 = READ_SYSREG(ESR_EL1); - ctxt.ifsr32_el2 = READ_SYSREG(IFSR32_EL2); + if ( is_32bit_domain(current->domain) ) + ctxt.ifsr32_el2 = READ_SYSREG(IFSR32_EL2); #endif ctxt.vttbr_el2 = READ_SYSREG64(VTTBR_EL2); -- 1.7.9.5