From: Chao Peng <chao.p.peng@linux.intel.com>
To: xen-devel@lists.xen.org
Cc: keir@xen.org, Ian.Campbell@citrix.com,
stefano.stabellini@eu.citrix.com, andrew.cooper3@citrix.com,
dario.faggioli@citrix.com, Ian.Jackson@eu.citrix.com,
will.auld@intel.com, JBeulich@suse.com, wei.liu2@citrix.com,
dgdegra@tycho.nsa.gov
Subject: [PATCH v9 04/13] x86: add COS information for each domain
Date: Wed, 3 Jun 2015 12:53:01 +0800 [thread overview]
Message-ID: <1433307190-6381-5-git-send-email-chao.p.peng@linux.intel.com> (raw)
In-Reply-To: <1433307190-6381-1-git-send-email-chao.p.peng@linux.intel.com>
In Xen's implementation, the CAT enforcement granularity is per domain.
Due to the length of CBM and the number of COS may be socket-different,
each domain has COS ID for each socket. The domain get COS=0 by default
and at runtime its COS is then allocated dynamically when user specifies
a CBM for the domain.
Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
Changes in v6:
* Add spinlock for cos_to_cbm.
---
xen/arch/x86/domain.c | 6 +++++-
xen/arch/x86/psr.c | 49 ++++++++++++++++++++++++++++++++++++++++++++
xen/include/asm-x86/domain.h | 5 ++++-
xen/include/asm-x86/psr.h | 3 +++
4 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index db073a6..0c4c43b 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -616,6 +616,9 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags,
/* 64-bit PV guest by default. */
d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
+ if ( (rc = psr_domain_init(d)) != 0 )
+ goto fail;
+
/* initialize default tsc behavior in case tools don't */
tsc_set_info(d, TSC_MODE_DEFAULT, 0UL, 0, 0);
spin_lock_init(&d->arch.vtsc_lock);
@@ -634,6 +637,7 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags,
free_perdomain_mappings(d);
if ( is_pv_domain(d) )
free_xenheap_page(d->arch.pv_domain.gdt_ldt_l1tab);
+ psr_domain_free(d);
return rc;
}
@@ -657,7 +661,7 @@ void arch_domain_destroy(struct domain *d)
free_xenheap_page(d->shared_info);
cleanup_domain_irq_mapping(d);
- psr_free_rmid(d);
+ psr_domain_free(d);
}
void arch_domain_shutdown(struct domain *d)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 2388121..bbb2485 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -30,6 +30,7 @@ struct psr_cat_socket_info {
unsigned int cbm_len;
unsigned int cos_max;
struct psr_cat_cbm *cos_to_cbm;
+ spinlock_t cbm_lock;
};
struct psr_assoc {
@@ -215,6 +216,52 @@ void psr_ctxt_switch_to(struct domain *d)
}
}
+/* Called with domain lock held, no extra lock needed for 'psr_cos_ids' */
+static void psr_free_cos(struct domain *d)
+{
+ unsigned int socket;
+ unsigned int cos;
+ struct psr_cat_socket_info *info;
+
+ if( !d->arch.psr_cos_ids )
+ return;
+
+ for ( socket = 0; socket < nr_sockets; socket++ )
+ {
+ if ( !test_bit(socket, cat_socket_enable) )
+ continue;
+
+ if ( (cos = d->arch.psr_cos_ids[socket]) == 0 )
+ continue;
+
+ info = cat_socket_info + socket;
+ spin_lock(&info->cbm_lock);
+ info->cos_to_cbm[cos].ref--;
+ spin_unlock(&info->cbm_lock);
+ }
+
+ xfree(d->arch.psr_cos_ids);
+ d->arch.psr_cos_ids = NULL;
+}
+
+int psr_domain_init(struct domain *d)
+{
+ if ( cat_socket_info )
+ {
+ d->arch.psr_cos_ids = xzalloc_array(unsigned int, nr_sockets);
+ if ( !d->arch.psr_cos_ids )
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+void psr_domain_free(struct domain *d)
+{
+ psr_free_rmid(d);
+ psr_free_cos(d);
+}
+
static int cat_cpu_prepare(unsigned int cpu)
{
struct psr_cat_socket_info *info;
@@ -258,6 +305,8 @@ static void cat_cpu_init(void)
/* cos=0 is reserved as default cbm(all ones). */
info->cos_to_cbm[0].cbm = (1ull << info->cbm_len) - 1;
+ spin_lock_init(&info->cbm_lock);
+
set_bit(socket, cat_socket_enable);
printk(XENLOG_INFO "CAT: enabled on socket %u, cos_max:%u, cbm_len:%u\n",
socket, info->cos_max, info->cbm_len);
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index 45b5283..fee50a1 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -333,7 +333,10 @@ struct arch_domain
struct e820entry *e820;
unsigned int nr_e820;
- unsigned int psr_rmid; /* RMID assigned to the domain for CMT */
+ /* RMID assigned to the domain for CMT */
+ unsigned int psr_rmid;
+ /* COS assigned to the domain for each socket */
+ unsigned int *psr_cos_ids;
/* Shared page for notifying that explicit PIRQ EOI is required. */
unsigned long *pirq_eoi_map;
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index bdda111..1023d5f 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -51,6 +51,9 @@ int psr_alloc_rmid(struct domain *d);
void psr_free_rmid(struct domain *d);
void psr_ctxt_switch_to(struct domain *d);
+int psr_domain_init(struct domain *d);
+void psr_domain_free(struct domain *d);
+
#endif /* __ASM_PSR_H__ */
/*
--
1.9.1
next prev parent reply other threads:[~2015-06-03 4:53 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-03 4:52 [PATCH v9 00/13] enable Cache Allocation Technology (CAT) for VMs Chao Peng
2015-06-03 4:52 ` [PATCH v9 01/13] x86: add socket_cpumask Chao Peng
2015-06-15 15:59 ` Jan Beulich
2015-06-03 4:52 ` [PATCH v9 02/13] x86: detect and initialize Intel CAT feature Chao Peng
2015-06-15 15:56 ` Jan Beulich
2015-06-03 4:53 ` [PATCH v9 03/13] x86: maintain COS to CBM mapping for each socket Chao Peng
2015-06-15 16:02 ` Jan Beulich
2015-06-23 7:08 ` Chao Peng
2015-06-23 8:27 ` Jan Beulich
2015-06-03 4:53 ` Chao Peng [this message]
2015-06-16 6:55 ` [PATCH v9 04/13] x86: add COS information for each domain Jan Beulich
2015-06-03 4:53 ` [PATCH v9 05/13] x86: expose CBM length and COS number information Chao Peng
2015-06-16 6:58 ` Jan Beulich
2015-06-03 4:53 ` [PATCH v9 06/13] x86: dynamically get/set CBM for a domain Chao Peng
2015-06-16 7:08 ` Jan Beulich
2015-06-23 7:19 ` Chao Peng
2015-06-23 8:35 ` Jan Beulich
2015-06-23 9:03 ` Chao Peng
2015-06-23 9:14 ` Jan Beulich
2015-06-03 4:53 ` [PATCH v9 07/13] x86: add scheduling support for Intel CAT Chao Peng
2015-06-03 4:53 ` [PATCH v9 08/13] xsm: add CAT related xsm policies Chao Peng
2015-06-03 4:53 ` [PATCH v9 09/13] tools/libxl: minor name changes for CMT commands Chao Peng
2015-06-03 4:53 ` [PATCH v9 10/13] tools/libxl: add command to show PSR hardware info Chao Peng
2015-06-03 4:53 ` [PATCH v9 11/13] tools/libxl: introduce some socket helpers Chao Peng
2015-06-03 4:53 ` [PATCH v9 12/13] tools: add tools support for Intel CAT Chao Peng
2015-06-03 4:53 ` [PATCH v9 13/13] docs: add xl-psr.markdown Chao Peng
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