From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: Design doc of adding ACPI support for arm64 on Xen - version 2 Date: Wed, 12 Aug 2015 09:47:04 +0100 Message-ID: <1439369224.9747.306.camel@citrix.com> References: <55C413D5.7000709@huawei.com> <1439302773.9747.266.camel@citrix.com> <1439302906.9747.268.camel@citrix.com> <55CA14C5.4090805@oracle.com> <1439307342.9747.285.camel@citrix.com> <55CA1A40.80408@oracle.com> <55CAB3DC.1040001@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <55CAB3DC.1040001@huawei.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Shannon Zhao , Boris Ostrovsky , xen-devel , Jan Beulich , Stefano Stabellini , Julien Grall , Parth Dixit , Christoffer Dall , Shannon Zhao , Roger Pau Monne Cc: Hangaohuai , "Huangpeng (Peter)" List-Id: xen-devel@lists.xenproject.org On Wed, 2015-08-12 at 10:47 +0800, Shannon Zhao wrote: > > On 2015/8/11 23:52, Boris Ostrovsky wrote: > > On 08/11/2015 11:35 AM, Ian Campbell wrote: > > > On Tue, 2015-08-11 at 11:29 -0400, Boris Ostrovsky wrote: > > > > On 08/11/2015 10:21 AM, Ian Campbell wrote: > > > > > On Tue, 2015-08-11 at 15:19 +0100, Ian Campbell wrote: > > > > > > On Fri, 2015-08-07 at 10:11 +0800, Shannon Zhao wrote: > > > > > > > This document is going to explain the design details of Xen > > > > > > > booting > > > > > > > with > > > > > > > ACPI on ARM. Maybe parts of it may not be appropriate. Any > > > > > > > comments > > > > > > > are > > > > > > > welcome. > > > > > > Some small subsets of this seem like they might overlap with > > > > > > what > > > > > > will be > > > > > > required for PVH on x86 (a new x86 guest mode not dissimilar to > > > > > > the > > > > > > sole > > > > > > ARM guest mode). If so then it would be preferable IMHO if PVH > > > > > > x86 > > > > > > could > > > > > > use the same interfaces. > > > > > > > > > > > > I've trimmed the quotes to just those bits and CCd some of the > > > > > > PVH > > > > > > people > > > > > > (Boris and Roger[0]) in case they have any thoughts. > > > > > > > > > > > > Actually, having done the trimming there is only one such bit: > > > > > > > > > > > > [...] > > > > > > > 4. Map MMIO regions > > > > > > > ------------------- > > > > > > > Register a bus_notifier for platform and amba bus in Linux. > > > > > Previously PCI was included in this scheme, which is why I > > > > > thought of > > > > > PVH, > > > > > having missed that PCI wasn't mentioned here now. > > > > > > > > > > Is it handled some other way now or is that just an accidental > > > > > omission? > > > > PCI already has a bus notifier which is probably why it's not > > > > explicitly > > > > called out here. > > > Right, but I was more specifically thinking of the bit which followed > > > regarding the use of the notifier to map the MMIO, which is the more > > > important bit. > > > > This notifier calls PHYSDEVOP_pci_device_add and as far as I can tell > > MMIO is mapped there (for IOMMU, which IIUIC is the main issue here). > > Right, at this moment we only add platform and amba bus bus_notifier. > The PCI device can reuse existing bus_notifier. Super. Perhaps add a sentence to that effect so I remember that this already exists next time?