[PATCH v6 17/31] xen/arm: ITS: Store LPIs allocated and IRQ ID bits per domain

[vijay.kilari@gmail.com]

From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>

Store number of lpis and number of id bits
in vgic structure

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
---
 xen/arch/arm/irq.c           |    9 +++++++++
 xen/arch/arm/vgic-v3-its.c   |    2 ++
 xen/arch/arm/vgic.c          |   12 ++++++++++++
 xen/include/asm-arm/domain.h |    3 +++
 xen/include/asm-arm/irq.h    |    3 +++
 5 files changed, 29 insertions(+)

diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index 24c4f24..93e9411 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -31,6 +31,15 @@
 static unsigned int local_irqs_type[NR_LOCAL_IRQS];
 static DEFINE_SPINLOCK(local_irqs_type_lock);
 
+/* Number of LPI supported in XEN */
+/*
+ * LPI number start from 8192. Minimum number of bits
+ * required to represent 8192 is 13 bits. So to Support LPIs minimum 
+ * 14 bits are required which can represent maximum LPI 16384.
+ * 16384 - 8192 = 8192. Minimum number of LPIs supported is 8192
+ */
+unsigned int nr_lpis = 8192;
+
 /* Describe an IRQ assigned to a guest */
 struct irq_guest
 {
diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index fabbad0..cef6139 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -547,6 +547,8 @@ int vits_domain_init(struct domain *d)
 
     ASSERT(is_hardware_domain(d));
 
+    d->arch.vgic.nr_lpis = nr_lpis;
+
     d->arch.vgic.vits = xzalloc(struct vgic_its);
     if ( !d->arch.vgic.vits )
         return -ENOMEM;
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index e28c30d..6b6bbce 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -72,8 +72,10 @@ int domain_vgic_init(struct domain *d, unsigned int nr_spis)
 {
     int i;
     int ret;
+    unsigned int irq_lines;
 
     d->arch.vgic.ctlr = 0;
+    d->arch.vgic.nr_lpis = 0;
 
     /* Limit the number of virtual SPIs supported to (1020 - 32) = 988  */
     if ( nr_spis > (1020 - NR_LOCAL_IRQS) )
@@ -130,6 +132,16 @@ int domain_vgic_init(struct domain *d, unsigned int nr_spis)
     for ( i = 0; i < NR_GIC_SGI; i++ )
         set_bit(i, d->arch.vgic.allocated_irqs);
 
+    irq_lines = d->arch.vgic.nr_spis + 32;
+    /*
+     * If LPIs are supported, then just overwrite nr_spis
+     * in computing id_bits.
+     */
+    if ( d->arch.vgic.nr_lpis != 0 )
+       irq_lines = d->arch.vgic.nr_lpis + FIRST_GIC_LPI;
+
+    d->arch.vgic.id_bits = get_count_order(irq_lines);
+
     return 0;
 }
 
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index 986a4d6..269e4bb 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -93,6 +93,9 @@ struct arch_domain
         spinlock_t lock;
         int ctlr;
         int nr_spis; /* Number of SPIs */
+        int nr_lpis; /* Number of LPIs */
+        /* Number of bits required to represent IRQs(SPIs+LPIs) */
+        int id_bits;
         unsigned long *allocated_irqs; /* bitmap of IRQs allocated */
         struct vgic_irq_rank *shared_irqs;
         /*
diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h
index bddd1ea..ff37234 100644
--- a/xen/include/asm-arm/irq.h
+++ b/xen/include/asm-arm/irq.h
@@ -33,6 +33,9 @@ struct msi_desc {
 #define nr_static_irqs NR_LINE_IRQS
 #define arch_hwdom_irqs(domid) NR_LINE_IRQS
 
+/* Number of LPI supported */
+extern unsigned int nr_lpis;
+
 struct irq_desc;
 struct irqaction;
 
-- 
1.7.9.5