Re: [PATCH v6 24/31] xen/arm: ITS: Add GICR register emulation

[Ian Campbell <ian.campbell@citrix.com>]

On Mon, 2015-09-07 at 20:56 +0530, Vijay Kilari wrote:
> On Mon, Sep 7, 2015 at 7:50 PM, Julien Grall <julien.grall@citrix.com>
> wrote:
> > Hi Vijay,
> > 
> > On 31/08/15 12:06, vijay.kilari@gmail.com wrote:
> > > +static int vgic_v3_gits_lpi_mmio_read(struct vcpu *v, mmio_info_t
> > > *info)
> > 
> > [...]
> > 
> > > +    /* Neglect if not LPI. */
> > > +    if ( offset < FIRST_GIC_LPI )
> > > +    {
> > > +        *r = 0;
> > > +        return 1;
> > > +    }
> > 
> > [...]
> > 
> > > +static int vgic_v3_gits_lpi_mmio_write(struct vcpu *v, mmio_info_t
> > > *info)
> > > +{
> > 
> > [...]
> > 
> > > +    /* Neglect if not LPI. */
> > > +    if ( offset < FIRST_GIC_LPI )
> > > +        return 1;
> > 
> > Based on the spec, those 2 checks are wrong and make impossible to use
> > LPIs. Please test this patch series before sending it on the ML.
> 
> Why do you think so?.

Consider which LPI is the subject of the word at the address pointed to by
GICR_PROPBASER. I think it is LPI==0 (== IRQ 8192), whereas this code
suggests that you think the entry for LPI==0 is at offset 8192 in the prop
table, which I don't think is correct.

Ian.