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From: Ian Campbell <ian.campbell@citrix.com>
To: Chris Brand <chris.brand@broadcom.com>, xen-devel@lists.xen.org
Cc: Julien Grall <julien.grall@citrix.com>,
	Stefano Stabellini <stefano.stabellini@citrix.com>
Subject: Re: [PATCH v3 2/2] xen: arm: Be explicit about bit values in mfn_to_xen_entry()
Date: Fri, 11 Sep 2015 15:10:26 +0100	[thread overview]
Message-ID: <1441980626.3549.48.camel@citrix.com> (raw)
In-Reply-To: <1441911389-3626-3-git-send-email-chris.brand@broadcom.com>

On Thu, 2015-09-10 at 11:56 -0700, Chris Brand wrote:
> Ensure that every relevant bit is given an explicit value.
> This has no effect on the generated code, but makes it
> a little easier to follow.
> 
> Reported-by: Julien Grall <julien.grall@citrix.com>
> Signed-off-by: Chris Brand <chris.brand@broadcom.com>

Acked + applied for 4.7 along with the first one.

I don't think there is any need for either for 4.6, since it's just a code
clarity thing.

> ---
> v3 trims down the list of bits given explicit values
> v2 adds comments on pxn and avail
> 
>  xen/include/asm-arm/page.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
> index 01628f3e96cb..a94e978a9995 100644
> --- a/xen/include/asm-arm/page.h
> +++ b/xen/include/asm-arm/page.h
> @@ -202,9 +202,12 @@ static inline lpae_t mfn_to_xen_entry(unsigned long
> mfn, unsigned attr)
>              .ai = attr,
>              .ns = 1,              /* Hyp mode is in the non-secure world
> */
>              .user = 1,            /* See below */
> +            .ro = 0,              /* Assume read-write */
>              .af = 1,              /* No need for access tracking */
>              .ng = 1,              /* Makes TLB flushes easier */
> +            .contig = 0,          /* Assume non-contiguous */
>              .xn = 1,              /* No need to execute outside .text */
> +            .avail = 0,           /* Reference count for domheap mapping
> */
>          }};;
>      /* Setting the User bit is strange, but the ATS1H[RW] instructions
>       * don't seem to work otherwise, and since we never run on Xen

      reply	other threads:[~2015-09-11 14:10 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-10 18:56 [PATCH v3 0/2] xen: arm: Give PTE bits explict values Chris Brand
2015-09-10 18:56 ` [PATCH v3 1/2] xen: arm re-order assignments in mfn_to_xen_entry() Chris Brand
2015-09-10 18:56 ` [PATCH v3 2/2] xen: arm: Be explicit about bit values " Chris Brand
2015-09-11 14:10   ` Ian Campbell [this message]

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