From: vijay.kilari@gmail.com
To: Ian.Campbell@citrix.com, julien.grall@citrix.com,
stefano.stabellini@eu.citrix.com, stefano.stabellini@citrix.com,
tim@xen.org, xen-devel@lists.xen.org
Cc: Prasun.Kapoor@caviumnetworks.com,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
manish.jaggi@caviumnetworks.com, vijay.kilari@gmail.com
Subject: [PATCH v7 04/28] xen/arm: Rename NR_IRQs and vgic_num_irqs helper function
Date: Fri, 18 Sep 2015 18:38:51 +0530 [thread overview]
Message-ID: <1442581755-2668-5-git-send-email-vijay.kilari@gmail.com> (raw)
In-Reply-To: <1442581755-2668-1-git-send-email-vijay.kilari@gmail.com>
From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
NR_IRQS represents the number of lines (i.e SGIs, PPIs and SPIs).
With the introduction of LPIs, NR_IRQs is renamed to NR_ITLINES.
Similarly vgic_num_irqs() is renamed as vgic_num_irq_lines().
Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
---
v7: - Renamed NR_LINE_IRQS as NR_ITLINES and vgic_num_line_irqs()
as vgic_num_irq_lines()
---
xen/arch/arm/gic.c | 2 +-
xen/arch/arm/irq.c | 10 +++++-----
xen/arch/arm/vgic-v3.c | 2 +-
xen/arch/arm/vgic.c | 10 +++++-----
xen/include/asm-arm/irq.h | 9 +++++----
xen/include/asm-arm/vgic.h | 2 +-
6 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index 1757193..1d94e5e 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -140,7 +140,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int virq,
ASSERT(spin_is_locked(&desc->lock));
/* Caller has already checked that the IRQ is an SPI */
ASSERT(virq >= 32);
- ASSERT(virq < vgic_num_irqs(d));
+ ASSERT(virq < vgic_num_irq_lines(d));
vgic_lock_rank(v_target, rank, flags);
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index 1f38605..9b48d9c 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -55,7 +55,7 @@ hw_irq_controller no_irq_type = {
.end = end_none
};
-static irq_desc_t irq_desc[NR_IRQS];
+static irq_desc_t irq_desc[NR_ITLINES];
static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc);
irq_desc_t *__irq_to_desc(int irq)
@@ -75,7 +75,7 @@ static int __init init_irq_data(void)
{
int irq;
- for (irq = NR_LOCAL_IRQS; irq < NR_IRQS; irq++) {
+ for (irq = NR_LOCAL_IRQS; irq < NR_ITLINES; irq++) {
struct irq_desc *desc = irq_to_desc(irq);
init_one_irq_desc(desc);
desc->irq = irq;
@@ -407,11 +407,11 @@ int route_irq_to_guest(struct domain *d, unsigned int virq,
unsigned long flags;
int retval = 0;
- if ( virq >= vgic_num_irqs(d) )
+ if ( virq >= vgic_num_irq_lines(d) )
{
printk(XENLOG_G_ERR
"the vIRQ number %u is too high for domain %u (max = %u)\n",
- irq, d->domain_id, vgic_num_irqs(d));
+ irq, d->domain_id, vgic_num_irq_lines(d));
return -EINVAL;
}
@@ -523,7 +523,7 @@ int release_guest_irq(struct domain *d, unsigned int virq)
int ret;
/* Only SPIs are supported */
- if ( virq < NR_LOCAL_IRQS || virq >= vgic_num_irqs(d) )
+ if ( virq < NR_LOCAL_IRQS || virq >= vgic_num_irq_lines(d) )
return -EINVAL;
p = spi_to_pending(d, virq);
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index daa510a..598f634 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -721,7 +721,7 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, mmio_info_t *info)
* Number of interrupt identifier bits supported by the GIC
* Stream Protocol Interface
*/
- unsigned int irq_bits = get_count_order(vgic_num_irqs(v->domain));
+ unsigned int irq_bits = get_count_order(vgic_num_irq_lines(v->domain));
/*
* Number of processors that may be used as interrupt targets when ARE
* bit is zero. The maximum is 8.
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index a6835a8..80a8f4e 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -122,7 +122,7 @@ int domain_vgic_init(struct domain *d, unsigned int nr_spis)
return ret;
d->arch.vgic.allocated_irqs =
- xzalloc_array(unsigned long, BITS_TO_LONGS(vgic_num_irqs(d)));
+ xzalloc_array(unsigned long, BITS_TO_LONGS(vgic_num_irq_lines(d)));
if ( !d->arch.vgic.allocated_irqs )
return -ENOMEM;
@@ -254,7 +254,7 @@ void arch_move_irqs(struct vcpu *v)
struct vcpu *v_target;
int i;
- for ( i = 32; i < vgic_num_irqs(d); i++ )
+ for ( i = 32; i < vgic_num_irq_lines(d); i++ )
{
v_target = vgic_get_target_vcpu(v, i);
p = irq_to_pending(v_target, i);
@@ -465,7 +465,7 @@ void vgic_vcpu_inject_spi(struct domain *d, unsigned int virq)
struct vcpu *v;
/* the IRQ needs to be an SPI */
- ASSERT(virq >= 32 && virq <= vgic_num_irqs(d));
+ ASSERT(virq >= 32 && virq <= vgic_num_irq_lines(d));
v = vgic_get_target_vcpu(d->vcpu[0], virq);
vgic_vcpu_inject_irq(v, virq);
@@ -487,7 +487,7 @@ int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
bool_t vgic_reserve_virq(struct domain *d, unsigned int virq)
{
- if ( virq >= vgic_num_irqs(d) )
+ if ( virq >= vgic_num_irq_lines(d) )
return 0;
return !test_and_set_bit(virq, d->arch.vgic.allocated_irqs);
@@ -507,7 +507,7 @@ int vgic_allocate_virq(struct domain *d, bool_t spi)
else
{
first = 32;
- end = vgic_num_irqs(d);
+ end = vgic_num_irq_lines(d);
}
/*
diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h
index f33c331..9be83b4 100644
--- a/xen/include/asm-arm/irq.h
+++ b/xen/include/asm-arm/irq.h
@@ -19,11 +19,12 @@ struct arch_irq_desc {
};
#define NR_LOCAL_IRQS 32
-#define NR_IRQS 1024
+/* Number of SGIs + PPIs + SPIs */
+#define NR_ITLINES 1024
-#define nr_irqs NR_IRQS
-#define nr_static_irqs NR_IRQS
-#define arch_hwdom_irqs(domid) NR_IRQS
+#define nr_irqs NR_ITLINES
+#define nr_static_irqs NR_ITLINES
+#define arch_hwdom_irqs(domid) NR_ITLINES
struct irq_desc;
struct irqaction;
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 62d24b6..cf5a790 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -307,7 +307,7 @@ enum gic_sgi_mode;
*/
#define REG_RANK_INDEX(b, n, s) ((((n) >> s) & ((b)-1)) % 32)
-#define vgic_num_irqs(d) ((d)->arch.vgic.nr_spis + 32)
+#define vgic_num_irq_lines(d) ((d)->arch.vgic.nr_spis + 32)
extern int domain_vgic_init(struct domain *d, unsigned int nr_spis);
extern void domain_vgic_free(struct domain *d);
--
1.7.9.5
next prev parent reply other threads:[~2015-09-18 13:08 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-18 13:08 [PATCH v7 00/28] Add ITS support vijay.kilari
2015-09-18 13:08 ` [PATCH v7 01/28] xen/arm: Add bitmap_find_next_zero_area helper function vijay.kilari
2015-09-18 13:08 ` [PATCH v7 02/28] xen: Add log2 functionality vijay.kilari
2015-09-18 13:08 ` [PATCH v7 03/28] xen/arm: Set nr_cpu_ids to available number of cpus vijay.kilari
2015-09-18 13:08 ` vijay.kilari [this message]
2015-09-21 10:40 ` [PATCH v7 04/28] xen/arm: Rename NR_IRQs and vgic_num_irqs helper function Julien Grall
2015-09-18 13:08 ` [PATCH v7 05/28] xen/arm: ITS: Port ITS driver to Xen vijay.kilari
2015-09-21 11:23 ` Julien Grall
2015-09-22 9:55 ` Vijay Kilari
2015-09-22 10:01 ` Julien Grall
2015-09-22 10:34 ` Vijay Kilari
2015-09-22 12:34 ` Julien Grall
2015-09-21 13:08 ` Julien Grall
2015-09-18 13:08 ` [PATCH v7 06/28] xen/arm: ITS: Add helper functions to manage its_devices vijay.kilari
2015-09-18 14:15 ` Julien Grall
2015-09-21 11:26 ` Julien Grall
2015-09-18 13:08 ` [PATCH v7 07/28] xen/arm: ITS: Introduce msi_desc for LPIs vijay.kilari
2015-09-18 13:08 ` [PATCH v7 08/28] xen/arm: ITS: Add APIs to add and assign device vijay.kilari
2015-09-21 13:47 ` Julien Grall
2015-09-22 7:33 ` Vijay Kilari
2015-09-22 13:19 ` Julien Grall
2015-09-18 13:08 ` [PATCH v7 09/28] xen/arm: ITS: Introduce gic_is_lpi helper function vijay.kilari
2015-09-21 14:20 ` Julien Grall
2015-09-22 9:10 ` Vijay Kilari
2015-09-22 13:24 ` Julien Grall
2015-09-18 13:08 ` [PATCH v7 10/28] xen/arm: ITS: Implement hw_irq_controller for LPIs vijay.kilari
2015-09-21 14:35 ` Julien Grall
2015-09-18 13:08 ` [PATCH v7 11/28] xen/arm: ITS: Enable compilation of physical ITS driver vijay.kilari
2015-09-18 13:08 ` [PATCH v7 12/28] xen/arm: ITS: Plumbing hw_irq_controller for LPIs vijay.kilari
2015-09-21 14:44 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 13/28] xen/arm: Move vgic rank locking inside get_irq_priority vijay.kilari
2015-09-21 14:49 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 14/28] xen/arm: ITS: Initialize physical ITS and export lpi support vijay.kilari
2015-09-21 15:20 ` Julien Grall
2015-09-22 9:17 ` Vijay Kilari
2015-09-22 9:45 ` Julien Grall
2015-09-22 10:05 ` Ian Campbell
2015-09-22 10:29 ` Julien Grall
2015-09-22 10:44 ` Ian Campbell
2015-09-22 12:31 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 15/28] xen/arm: ITS: Add virtual ITS driver vijay.kilari
2015-09-21 15:34 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 16/28] xen/arm: ITS: Add virtual ITS commands support vijay.kilari
2015-09-22 13:47 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 17/28] xen/arm: ITS: Add GITS registers emulation vijay.kilari
2015-09-22 14:30 ` Julien Grall
2015-09-24 5:07 ` Vijay Kilari
2015-09-24 11:05 ` Julien Grall
2015-09-24 11:29 ` Ian Campbell
2015-09-24 11:43 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 18/28] xen/arm: ITS: Export ITS info to Virtual ITS vijay.kilari
2015-09-23 8:31 ` Julien Grall
2015-09-24 5:26 ` Vijay Kilari
2015-09-24 8:27 ` Ian Campbell
2015-09-24 11:31 ` Julien Grall
2015-09-24 11:41 ` Ian Campbell
2015-09-18 13:09 ` [PATCH v7 19/28] xen/arm: ITS: Store LPIs allocated per domain vijay.kilari
2015-09-23 8:37 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 20/28] xen/arm: ITS: Add virtual ITS availability check helper vijay.kilari
2015-09-23 8:52 ` Julien Grall
2015-09-24 6:44 ` Vijay Kilari
2015-09-24 11:47 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 21/28] xen/arm: ITS: Add GICR register emulation vijay.kilari
2015-09-23 10:22 ` Julien Grall
2015-09-26 16:08 ` Vijay Kilari
2015-09-28 9:53 ` Ian Campbell
2015-09-28 10:37 ` Vijay Kilari
2015-09-28 11:03 ` Julien Grall
2015-09-29 9:35 ` Vijay Kilari
2015-09-18 13:09 ` [PATCH v7 22/28] xen/arm: ITS: Allocate irq descriptors for LPIs vijay.kilari
2015-09-23 10:28 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 23/28] xen/arm: ITS: Allocate pending_lpi " vijay.kilari
2015-09-24 12:38 ` Julien Grall
2015-09-18 13:09 ` [PATCH v7 24/28] xen/arm: ITS: Route LPIs vijay.kilari
2015-09-18 13:09 ` [PATCH v7 25/28] xen/arm: ITS: Add domain specific ITS initialization vijay.kilari
2015-09-18 13:09 ` [PATCH v7 26/28] xen/arm: ITS: Map ITS translation space vijay.kilari
2015-09-18 13:09 ` [PATCH v7 27/28] xen/arm: ITS: Generate ITS node for Dom0 vijay.kilari
2015-09-18 13:09 ` [PATCH v7 28/28] xen/arm: ITS: Add pci devices in ThunderX vijay.kilari
2015-09-22 15:09 ` Julien Grall
2015-09-18 13:51 ` [PATCH v7 00/28] Add ITS support Julien Grall
2015-09-21 6:52 ` Vijay Kilari
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1442581755-2668-5-git-send-email-vijay.kilari@gmail.com \
--to=vijay.kilari@gmail.com \
--cc=Ian.Campbell@citrix.com \
--cc=Prasun.Kapoor@caviumnetworks.com \
--cc=Vijaya.Kumar@caviumnetworks.com \
--cc=julien.grall@citrix.com \
--cc=manish.jaggi@caviumnetworks.com \
--cc=stefano.stabellini@citrix.com \
--cc=stefano.stabellini@eu.citrix.com \
--cc=tim@xen.org \
--cc=xen-devel@lists.xen.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).