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From: Shuai Ruan <shuai.ruan@linux.intel.com>
To: xen-devel@lists.xen.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
	Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com,
	jun.nakajima@intel.com, andrew.cooper3@citrix.com,
	ian.jackson@eu.citrix.com, eddie.dong@intel.com,
	jbeulich@suse.com, keir@xen.org
Subject: [V5 4/4] libxc: expose xsaves/xgetbv1/xsavec to hvm guest
Date: Mon, 21 Sep 2015 19:34:01 +0800	[thread overview]
Message-ID: <1442835241-26983-5-git-send-email-shuai.ruan@linux.intel.com> (raw)
In-Reply-To: <1442835241-26983-1-git-send-email-shuai.ruan@linux.intel.com>

This patch exposes xsaves/xgetbv1/xsavec to hvm guest.
The reserved bits of eax/ebx/ecx/edx must be cleaned up
when call cpuid(0dh) with leaf 1 or 2..63.

According to the spec the following bits must be reserved:
For leaf 1, bits 03-04/08-31 of ecx is reserved. Edx is reserved.
For leaf 2...63, bits 01-31 of ecx is reserved. Edx is reserved.

Acked-by: Ian Campbell <ian.campbell@citrix.com>
Signed-off-by: Shuai Ruan <shuai.ruan@linux.intel.com>
---
 tools/libxc/xc_cpuid_x86.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index e146a3e..538d356 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -210,6 +210,10 @@ static void intel_xc_cpuid_policy(
 }
 
 #define XSAVEOPT        (1 << 0)
+#define XSAVEC          (1 << 1)
+#define XGETBV1         (1 << 2)
+#define XSAVES          (1 << 3)
+#define XSS_SUPPORT     (1 << 0)
 /* Configure extended state enumeration leaves (0x0000000D for xsave) */
 static void xc_cpuid_config_xsave(
     xc_interface *xch, domid_t domid, uint64_t xfeature_mask,
@@ -246,8 +250,9 @@ static void xc_cpuid_config_xsave(
         regs[1] = 512 + 64; /* FP/SSE + XSAVE.HEADER */
         break;
     case 1: /* leaf 1 */
-        regs[0] &= XSAVEOPT;
-        regs[1] = regs[2] = regs[3] = 0;
+        regs[0] &= (XSAVEOPT | XSAVEC | XGETBV1 | XSAVES);
+        regs[2] &= xfeature_mask;
+        regs[3] = 0;
         break;
     case 2 ... 63: /* sub-leaves */
         if ( !(xfeature_mask & (1ULL << input[1])) )
@@ -255,8 +260,9 @@ static void xc_cpuid_config_xsave(
             regs[0] = regs[1] = regs[2] = regs[3] = 0;
             break;
         }
-        /* Don't touch EAX, EBX. Also cleanup ECX and EDX */
-        regs[2] = regs[3] = 0;
+        /* Don't touch EAX, EBX. Also cleanup EDX. Cleanup bits 01-32 of ECX*/
+        regs[2] &= XSS_SUPPORT;
+        regs[3] = 0;
         break;
     }
 }
-- 
1.9.1

  parent reply	other threads:[~2015-09-21 11:34 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-21 11:33 [V5 0/4] add xsaves/xrstors support Shuai Ruan
2015-09-21 11:33 ` [V5 1/4] x86/xsaves: add basic definitions/helpers to support xsaves Shuai Ruan
2015-09-28  9:01   ` Jan Beulich
2015-10-09  8:17     ` Shuai Ruan
     [not found]     ` <20151009081743.GB13489@shuai.ruan@linux.intel.com>
2015-10-09  8:27       ` Jan Beulich
2015-09-21 11:33 ` [V5 2/4] x86/xsaves: enable xsaves/xrstors/xsavec in xen Shuai Ruan
2015-09-28 16:03   ` Jan Beulich
2015-10-09  5:49     ` Shuai Ruan
     [not found]     ` <20151009054906.GA10028@shuai.ruan@linux.intel.com>
2015-10-09  7:13       ` Jan Beulich
2015-10-09  8:14         ` Shuai Ruan
     [not found]         ` <20151009081437.GA13489@shuai.ruan@linux.intel.com>
2015-10-09  8:30           ` Jan Beulich
2015-09-21 11:34 ` [V5 3/4] x86/xsaves: enable xsaves/xrstors for hvm guest Shuai Ruan
2015-09-29  8:38   ` Jan Beulich
2015-09-21 11:34 ` Shuai Ruan [this message]
2015-09-21 11:49   ` [V5 4/4] libxc: expose xsaves/xgetbv1/xsavec to " Jan Beulich

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