From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brijesh Singh Subject: [PATCH v3] xen/arm: psci: use SMC64 function ID when available on ARM64 Date: Mon, 5 Oct 2015 11:38:39 -0500 Message-ID: <1444063119-16623-1-git-send-email-brijeshkumar.singh@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org Cc: stefano.stabellini@citrix.com, ian.campbell@citrix.com, suravee.suthikulpanit@amd.com, Brijesh Singh List-Id: xen-devel@lists.xenproject.org As per PSCI 0.2 spec, if CPU_ON entry_point_address is 64-bit then SMC call function ID parameter should be set to SMC64 version. Signed-off-by: Brijesh Singh --- xen/arch/arm/psci.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index 7ad6a43..172c6e7 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -23,6 +23,18 @@ #include #include +/* + * While a 64-bit OS can make calls with SMC32 calling conventions, for + * some calls it is necessary to use SMC64 to pass or return 64-bit values. + * For such calls PSCI_0_2_FN_NATIVE(x) will choose the appropriate + * (native-width) function ID. + */ +#ifdef CONFIG_ARM_64 +#define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64_##name +#else +#define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN_##name +#endif + uint32_t psci_ver; static uint32_t psci_cpu_on_nr; @@ -116,7 +128,7 @@ int __init psci_init_0_2(void) return -EOPNOTSUPP; } - psci_cpu_on_nr = PSCI_0_2_FN_CPU_ON; + psci_cpu_on_nr = PSCI_0_2_FN_NATIVE(CPU_ON); printk(XENLOG_INFO "Using PSCI-0.2 for SMP bringup\n"); -- 1.9.1