From: Ian Campbell <ian.campbell@citrix.com>
To: Julien Grall <julien.grall@citrix.com>, xen-devel@lists.xenproject.org
Cc: stefano.stabellini@eu.citrix.com
Subject: Re: [PATCH v3 7/9] xen/arm: vgic: Optimize the way to store the target vCPU in the rank
Date: Wed, 7 Oct 2015 16:38:40 +0100 [thread overview]
Message-ID: <1444232320.1410.82.camel@citrix.com> (raw)
In-Reply-To: <1444228871-383-8-git-send-email-julien.grall@citrix.com>
On Wed, 2015-10-07 at 15:41 +0100, Julien Grall wrote:
> Note that with these changes, any read to those registers will list only
> the target vCPU used by Xen. We think this is likely to be OK because the
> GIC spec doesn't require to return exactly the value written and it can
> be seen as if we decide to implement the register read-only.
This still isn't true.
The GIC spec requires one of two modes: Either the register is read-only
_or_ it is writable and one can expect to read back what was written
(because the spec doesn't say otherwise and doing otherwise would
definitely be exceptional behaviour).
This comment needs to explain why believe we are able to get away with
implementing a third option despite that, i.e. why we think it is ok to
push the boundaries of the spec here.
At no point should the behaviour implemented be compared to implementing
the register as read-only, because that is a bogus comparison. A register
cannot be "sort of read-only" and justifying the behaviour here on that
basis is incorrect.
> Changes in v3:
> - Make clear in the commit message that we rely on a corner case
> of the spec.
No we don't. We do something out of spec which we think we can get away
with implementing as we have done.
Ian.
next prev parent reply other threads:[~2015-10-07 15:38 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-07 14:41 [PATCH v3 0/9] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-10-07 14:41 ` [PATCH v3 1/9] xen/arm: io: remove mmio_check_t typedef Julien Grall
2015-10-07 14:41 ` [PATCH v3 2/9] xen/arm: io: Extend write/read handler to pass the register in parameter Julien Grall
2015-10-07 14:41 ` [PATCH v3 3/9] xen/arm: io: Support sign-extension for every read access Julien Grall
2015-10-07 14:41 ` [PATCH v3 4/9] xen/arm: vgic: ctlr stores a 32-bit hardware register so use uint32_t Julien Grall
2015-10-07 14:41 ` [PATCH v3 5/9] xen/arm: vgic: Optimize the way to store GICD_IPRIORITYR in the rank Julien Grall
2015-10-07 14:41 ` [PATCH v3 6/9] xen/arm: vgic: Introduce a new field to store the rank index and use it Julien Grall
2015-10-07 14:41 ` [PATCH v3 7/9] xen/arm: vgic: Optimize the way to store the target vCPU in the rank Julien Grall
2015-10-07 15:38 ` Ian Campbell [this message]
2015-10-07 15:48 ` Julien Grall
2015-10-07 16:00 ` Ian Campbell
2015-10-07 16:29 ` Julien Grall
2015-10-07 19:13 ` Julien Grall
2015-10-08 9:39 ` Ian Campbell
2015-10-08 10:43 ` Julien Grall
2015-10-07 17:26 ` Stefano Stabellini
2015-10-07 18:16 ` Julien Grall
2015-10-08 10:56 ` Ian Campbell
2015-10-08 11:36 ` Stefano Stabellini
2015-10-08 12:23 ` Ian Campbell
2015-10-08 12:34 ` Stefano Stabellini
2015-10-08 13:46 ` Julien Grall
2015-10-08 14:25 ` Ian Campbell
2015-10-08 18:36 ` Julien Grall
2015-10-09 11:24 ` Julien Grall
2015-10-09 11:38 ` Ian Campbell
2015-10-12 10:41 ` Stefano Stabellini
2015-10-12 11:00 ` Julien Grall
2015-10-12 11:07 ` Stefano Stabellini
2015-10-12 11:28 ` Julien Grall
2015-10-07 14:41 ` [PATCH v3 8/9] xen/arm: vgic: Introduce helpers to extract/update/clear/set vGIC register Julien Grall
2015-10-07 14:41 ` [PATCH v3 9/9] xen/arm: vgic-v3: Support 32-bit access for 64-bit registers Julien Grall
2015-10-08 10:44 ` [PATCH v3 0/9] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-10-08 11:46 ` Ian Campbell
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