From: Julien Grall <julien.grall@citrix.com>
To: xen-devel@lists.xenproject.org
Cc: Julien Grall <julien.grall@citrix.com>,
ian.campbell@citrix.com, stefano.stabellini@eu.citrix.com
Subject: [PATCH v5 0/6] xen/arm: vgic: Support 32-bit access for 64-bit register
Date: Mon, 9 Nov 2015 15:49:35 +0000 [thread overview]
Message-ID: <1447084181-13677-1-git-send-email-julien.grall@citrix.com> (raw)
Hi all,
This series aims to fix the 32-bit access on 64-bit registers. Some guest
OS such as FreeBSD and Linux (ITS and recently 32-bit guest using GICv3)
use 32-bit access and will crash at boot time.
For all the changes see in each patch.
Sincerely yours,
Julien Grall (6):
xen/arm: vgic-v2: Implement correctly ITARGETSR0 - ITARGETSR7
read-only
xen/arm: vgic-v2: Handle correctly byte write in ITARGETSR
xen/arm: vgic-v2: Don't ignore a write in ITARGETSR if one field is 0
xen/arm: vgic: Optimize the way to store the target vCPU in the rank
xen/arm: vgic: Introduce helpers to extract/update/clear/set vGIC
register ...
xen/arm: vgic-v3: Support 32-bit access for 64-bit registers
xen/arch/arm/vgic-v2.c | 282 +++++++++++++++++++++++++++------------------
xen/arch/arm/vgic-v3.c | 264 ++++++++++++++++++++++++++----------------
xen/arch/arm/vgic.c | 45 ++++++--
xen/include/asm-arm/gic.h | 2 +
xen/include/asm-arm/vgic.h | 129 +++++++++++++++++----
5 files changed, 480 insertions(+), 242 deletions(-)
--
2.1.4
next reply other threads:[~2015-11-09 15:51 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-09 15:49 Julien Grall [this message]
2015-11-09 15:49 ` [PATCH v5 1/6] xen/arm: vgic-v2: Implement correctly ITARGETSR0 - ITARGETSR7 read-only Julien Grall
2015-11-13 11:18 ` Stefano Stabellini
2015-11-16 13:23 ` Ian Campbell
2015-11-18 16:20 ` Julien Grall
2015-11-09 15:49 ` [PATCH v5 2/6] xen/arm: vgic-v2: Handle correctly byte write in ITARGETSR Julien Grall
2015-11-13 12:08 ` Stefano Stabellini
2015-11-09 15:49 ` [PATCH v5 3/6] xen/arm: vgic-v2: Don't ignore a write in ITARGETSR if one field is 0 Julien Grall
2015-11-13 14:37 ` Stefano Stabellini
2015-11-13 14:52 ` Julien Grall
2015-11-13 15:05 ` Stefano Stabellini
2015-11-13 15:39 ` Julien Grall
2015-11-09 15:49 ` [PATCH v5 4/6] xen/arm: vgic: Optimize the way to store the target vCPU in the rank Julien Grall
2015-11-13 15:44 ` Stefano Stabellini
2015-11-13 15:49 ` Julien Grall
2015-11-09 15:49 ` [PATCH v5 5/6] xen/arm: vgic: Introduce helpers to extract/update/clear/set vGIC register Julien Grall
2015-11-11 16:09 ` Julien Grall
2015-11-16 13:14 ` Ian Campbell
2015-11-09 15:49 ` [PATCH v5 6/6] xen/arm: vgic-v3: Support 32-bit access for 64-bit registers Julien Grall
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