From mboxrd@z Thu Jan 1 00:00:00 1970 From: Huaitong Han Subject: [PATCH 07/10] x86/hvm: pkeys, add functions to support PKRU access/write Date: Mon, 16 Nov 2015 18:31:54 +0800 Message-ID: <1447669917-17939-8-git-send-email-huaitong.han@intel.com> References: <1447669917-17939-1-git-send-email-huaitong.han@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1447669917-17939-1-git-send-email-huaitong.han@intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: jbeulich@suse.com, andrew.cooper3@citrix.com, jun.nakajima@intel.com, eddie.dong@intel.com, kevin.tian@intel.com, george.dunlap@eu.citrix.com, ian.jackson@eu.citrix.com, stefano.stabellini@eu.citrix.com, ian.campbell@citrix.com, wei.liu2@citrix.com, keir@xen.org Cc: Huaitong Han , xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org This patch adds functions to support PKRU access/write Signed-off-by: Huaitong Han diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index f507f5e..427eb84 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -336,6 +336,44 @@ static inline void write_cr4(unsigned long val) asm volatile ( "mov %0,%%cr4" : : "r" (val) ); } +static inline unsigned int read_pkru(void) +{ + unsigned int eax, edx; + unsigned int ecx = 0; + unsigned int pkru; + + asm volatile(".byte 0x0f,0x01,0xee\n\t" + : "=a" (eax), "=d" (edx) + : "c" (ecx)); + pkru = eax; + return pkru; +} + +static inline void write_pkru(unsigned int pkru) +{ + unsigned int eax = pkru; + unsigned int ecx = 0; + unsigned int edx = 0; + + asm volatile(".byte 0x0f,0x01,0xef\n\t" + : : "a" (eax), "c" (ecx), "d" (edx)); +} + +/* macros for pkru */ +#define PKRU_READ 0 +#define PKRU_WRITE 1 +#define PKRU_ATTRS 2 + +/* +* PKRU defines 32 bits, there are 16 domains and 2 attribute bits per +* domain in pkru, pkeys is index to a defined domain, so the value of +* pte_pkeys * PKRU_ATTRS + R/W is offset of a defined domain attribute. +*/ +#define READ_PKRU_AD(x) ((read_pkru() >> (x * PKRU_ATTRS + PKRU_READ)) & 1) +#define READ_PKRU_WD(x) ((read_pkru() >> (x * PKRU_ATTRS + PKRU_WRITE)) & 1) + + + /* Clear and set 'TS' bit respectively */ static inline void clts(void) { -- 2.4.3