From: Ian Campbell <ian.campbell@citrix.com>
To: Julien Grall <julien.grall@citrix.com>, xen-devel@lists.xenproject.org
Cc: stefano.stabellini@eu.citrix.com
Subject: Re: [PATCH v5 1/6] xen/arm: vgic-v2: Implement correctly ITARGETSR0 - ITARGETSR7 read-only
Date: Mon, 16 Nov 2015 13:23:54 +0000 [thread overview]
Message-ID: <1447680234.27871.87.camel@citrix.com> (raw)
In-Reply-To: <1447084181-13677-2-git-send-email-julien.grall@citrix.com>
On Mon, 2015-11-09 at 15:49 +0000, Julien Grall wrote:
> #define GICD_ITARGETSR (0x800)
> +#define GICD_ITARGETSR7 (0x81C)
> +#define GICD_ITARGETSR8 (0x820)
As a future change, I wonder if making these take a parameter (N) and do
the necessary arithmetic would be less error prone?
> #define GICD_ITARGETSRN (0xBF8)
> #define GICD_ICFGR (0xC00)
> #define GICD_ICFGRN (0xCFC)
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next prev parent reply other threads:[~2015-11-16 13:24 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-09 15:49 [PATCH v5 0/6] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-11-09 15:49 ` [PATCH v5 1/6] xen/arm: vgic-v2: Implement correctly ITARGETSR0 - ITARGETSR7 read-only Julien Grall
2015-11-13 11:18 ` Stefano Stabellini
2015-11-16 13:23 ` Ian Campbell [this message]
2015-11-18 16:20 ` Julien Grall
2015-11-09 15:49 ` [PATCH v5 2/6] xen/arm: vgic-v2: Handle correctly byte write in ITARGETSR Julien Grall
2015-11-13 12:08 ` Stefano Stabellini
2015-11-09 15:49 ` [PATCH v5 3/6] xen/arm: vgic-v2: Don't ignore a write in ITARGETSR if one field is 0 Julien Grall
2015-11-13 14:37 ` Stefano Stabellini
2015-11-13 14:52 ` Julien Grall
2015-11-13 15:05 ` Stefano Stabellini
2015-11-13 15:39 ` Julien Grall
2015-11-09 15:49 ` [PATCH v5 4/6] xen/arm: vgic: Optimize the way to store the target vCPU in the rank Julien Grall
2015-11-13 15:44 ` Stefano Stabellini
2015-11-13 15:49 ` Julien Grall
2015-11-09 15:49 ` [PATCH v5 5/6] xen/arm: vgic: Introduce helpers to extract/update/clear/set vGIC register Julien Grall
2015-11-11 16:09 ` Julien Grall
2015-11-16 13:14 ` Ian Campbell
2015-11-09 15:49 ` [PATCH v5 6/6] xen/arm: vgic-v3: Support 32-bit access for 64-bit registers Julien Grall
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