From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: Re: [PATCH 9/9] xen/arm: vgic-v3: Make clear that GICD_*SPI_* registers are reserved Date: Mon, 16 Nov 2015 13:39:24 +0000 Message-ID: <1447681164.27871.98.camel@citrix.com> References: <1447415672-31633-1-git-send-email-julien.grall@citrix.com> <1447415672-31633-10-git-send-email-julien.grall@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ZyK13-00025H-MZ for xen-devel@lists.xenproject.org; Mon, 16 Nov 2015 13:40:17 +0000 In-Reply-To: <1447415672-31633-10-git-send-email-julien.grall@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Julien Grall , xen-devel@lists.xenproject.org Cc: stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org On Fri, 2015-11-13 at 11:54 +0000, Julien Grall wrote: > Our vGIC emulation have GICD_TYPER.MBIS set to 0 which means that > GICD_*SPI_* registers are reserved. Implement them using the *_reserved > labels. > > Also, implement thoses registers for the read part. "those" ("these" might be better though) > > Signed-off-by: Julien Grall Acked-by: Ian Campbell