[RFC 04/10] xen/arm64: Add an assembly macro for perf counter

[Julien Grall <julien.grall@citrix.com>]

Allow assembly code to use performance counter.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
---
 xen/include/asm-arm/arm64/asm_defns.h | 36 +++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/xen/include/asm-arm/arm64/asm_defns.h b/xen/include/asm-arm/arm64/asm_defns.h
index 7085c26..36442b8 100644
--- a/xen/include/asm-arm/arm64/asm_defns.h
+++ b/xen/include/asm-arm/arm64/asm_defns.h
@@ -20,6 +20,42 @@ stp     \xreg1, \xreg2, [sp, #-16]!
 ldp     \xreg1, \xreg2, [sp], #16
 .endm
 
+#ifdef PERF_COUNTERS
+
+.macro perfc_incr, name, idx
+push    x0, x1                  /* x0 and x1 are used by the macro -> save them */
+
+/*
+ * Compute the address of the perf counters
+ *
+ * Note that each perf counters are 4 bytes and stored percpu.
+ */
+mov     x0, \idx                /* x0 <- index from ASM_PERFC_* */
+add     x0, x0, #\name          /* x0 <- index in the percpu array */
+lsl     x0, x0, 2               /* x0 <- offset from per_cpu__perfcounters. */
+ldr     x1, =per_cpu__perfcounters
+add     x0, x0, x1              /* x0 <- offset in the percpu area */
+mrs     x1, TPIDR_EL2           /* x1 <- per cpu offset */
+add     x0, x0, x1              /* x0 <- address of the perf counter for this cpu */
+
+/*
+ * Increment the perf counters.
+ *
+ * Note it's not atomic so does the C version.
+ */
+ldr     x1, [x0]                /* x1 <- current value of the counter */
+add     x1, x1, 1               /* x1 <- increment the counter */
+str     x1, [x0]                /* Store the counters incremented */
+
+pop     x0, x1                  /* Restore x0, x1 */
+.endm
+
+#define PERFC_INCR(_name, _idx) perfc_incr  ASM_PERFC_##_name, _idx
+
+#else
+#define PERFC_INCR(_name, _idx)
+#endif
+
 #endif /* !__ASSEMBLY__ */
 
 
-- 
2.1.4