From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: [PATCH RFC 30/31] x86/domctl: Update PV domain cpumasks when setting cpuid policy Date: Wed, 16 Dec 2015 21:24:32 +0000 Message-ID: <1450301073-28191-31-git-send-email-andrew.cooper3@citrix.com> References: <1450301073-28191-1-git-send-email-andrew.cooper3@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1450301073-28191-1-git-send-email-andrew.cooper3@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Xen-devel Cc: Andrew Cooper , Jan Beulich List-Id: xen-devel@lists.xenproject.org This allows PV domains with different featuresets to observe different values from a native cpuid instruction, on supporting hardware. Signed-off-by: Andrew Cooper --- CC: Jan Beulich --- xen/arch/x86/domctl.c | 68 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 5eb8f00..967e8e7 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -77,6 +77,74 @@ static void update_domain_cpuid_info(struct domain *d, d->arch.x86_model = (ctl->eax >> 4) & 0xf; if ( d->arch.x86 >= 0x6 ) d->arch.x86_model |= (ctl->eax >> 12) & 0xf0; + + if ( is_pv_domain(d) ) + { + uint64_t mask = cpumask_defaults._1cd; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + mask &= ((uint64_t)ctl->edx << 32) | ctl->ecx; + else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + mask &= ((uint64_t)ctl->ecx << 32) | ctl->edx; + + d->arch.pv_domain.masks->_1cd = mask; + } + break; + + case 6: + if ( is_pv_domain(d) ) + { + uint64_t mask = cpumask_defaults._6c; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + mask &= ((~0ULL << 32) | ctl->ecx); + + d->arch.pv_domain.masks->_6c = mask; + } + break; + + case 7: + if ( ctl->input[1] != 0 ) + break; + + if ( is_pv_domain(d) ) + { + uint64_t mask = cpumask_defaults._7ab0; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + mask &= ((uint64_t)ctl->eax << 32) | ctl->ebx; + + d->arch.pv_domain.masks->_7ab0 = mask; + } + break; + + case 0xd: + if ( ctl->input[1] != 1 ) + break; + + if ( is_pv_domain(d) ) + { + uint64_t mask = cpumask_defaults.Da1; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + mask &= ((~0ULL << 32) | ctl->eax); + + d->arch.pv_domain.masks->Da1 = mask; + } + break; + + case 0x80000001: + if ( is_pv_domain(d) ) + { + uint64_t mask = cpumask_defaults.e1cd; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + mask &= ((uint64_t)ctl->edx << 32) | ctl->ecx; + else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + mask &= ((uint64_t)ctl->ecx << 32) | ctl->edx; + + d->arch.pv_domain.masks->e1cd = mask; + } break; } } -- 2.1.4