From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: [PATCH v2 02/30] xen/x86: Do not store VIA/Cyrix/Centaur CPU features Date: Fri, 5 Feb 2016 13:41:55 +0000 Message-ID: <1454679743-18133-3-git-send-email-andrew.cooper3@citrix.com> References: <1454679743-18133-1-git-send-email-andrew.cooper3@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1454679743-18133-1-git-send-email-andrew.cooper3@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Xen-devel Cc: Andrew Cooper , Jan Beulich List-Id: xen-devel@lists.xenproject.org Nothing uses them. Signed-off-by: Andrew Cooper --- CC: Jan Beulich New in v2 --- xen/arch/x86/cpu/centaur.c | 3 --- xen/include/asm-x86/cpufeature.h | 12 +----------- 2 files changed, 1 insertion(+), 14 deletions(-) diff --git a/xen/arch/x86/cpu/centaur.c b/xen/arch/x86/cpu/centaur.c index c0ac117..b137d55 100644 --- a/xen/arch/x86/cpu/centaur.c +++ b/xen/arch/x86/cpu/centaur.c @@ -38,9 +38,6 @@ static void init_c3(struct cpuinfo_x86 *c) wrmsrl(MSR_VIA_RNG, msr_content | RNG_ENABLE); printk(KERN_INFO "CPU: Enabled h/w RNG\n"); } - - c->x86_capability[cpufeat_word(X86_FEATURE_XSTORE)] - = cpuid_edx(0xC0000001); } if (c->x86 == 0x6 && c->x86_model >= 0xf) { diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 6583039..e7e369b 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -109,17 +109,7 @@ #define X86_FEATURE_RDRAND (4*32+30) /* Digital Random Number Generator */ #define X86_FEATURE_HYPERVISOR (4*32+31) /* Running under some hypervisor */ -/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ -#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ -#define X86_FEATURE_XSTORE_EN (5*32+ 3) /* on-CPU RNG enabled */ -#define X86_FEATURE_XCRYPT (5*32+ 6) /* on-CPU crypto (xcrypt insn) */ -#define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */ -#define X86_FEATURE_ACE2 (5*32+ 8) /* Advanced Cryptography Engine v2 */ -#define X86_FEATURE_ACE2_EN (5*32+ 9) /* ACE v2 enabled */ -#define X86_FEATURE_PHE (5*32+ 10) /* PadLock Hash Engine */ -#define X86_FEATURE_PHE_EN (5*32+ 11) /* PHE enabled */ -#define X86_FEATURE_PMM (5*32+ 12) /* PadLock Montgomery Multiplier */ -#define X86_FEATURE_PMM_EN (5*32+ 13) /* PMM enabled */ +/* UNUSED, word 5 */ /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ -- 2.1.4