From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xen.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Jan Beulich <JBeulich@suse.com>
Subject: [PATCH v2 2/8] xen/x86: Improvements to build-time pagetable generation
Date: Tue, 23 Feb 2016 16:31:19 +0000 [thread overview]
Message-ID: <1456245085-2302-3-git-send-email-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <1456245085-2302-1-git-send-email-andrew.cooper3@citrix.com>
* Additional comments, including size and runtime use.
* Consistent use of idx, rather than a mix including pfn.
* Consistent use of .quad, rather than a mix including .long.
* Consistent use of PAGE_HYPERVISOR for addresses in the Xen global range,
which include _PAGE_GLOBAL.
No change in runtime behaviour.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
New in v2
---
xen/arch/x86/boot/x86_64.S | 45 ++++++++++++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index 94cf089..cc10932 100644
--- a/xen/arch/x86/boot/x86_64.S
+++ b/xen/arch/x86/boot/x86_64.S
@@ -86,32 +86,40 @@ GLOBAL(__page_tables_start)
* Mapping of first 2 megabytes of memory. This is mapped with 4kB mappings
* to avoid type conflicts with fixed-range MTRRs covering the lowest megabyte
* of physical memory. In any case the VGA hole should be mapped with type UC.
+ * Uses 1x 4k page.
*/
GLOBAL(l1_identmap)
- pfn = 0
+ idx = 0
.rept L1_PAGETABLE_ENTRIES
/* VGA hole (0xa0000-0xc0000) should be mapped UC. */
- .if pfn >= 0xa0 && pfn < 0xc0
- .long (pfn << PAGE_SHIFT) | PAGE_HYPERVISOR_NOCACHE | MAP_SMALL_PAGES
+ .if idx >= 0xa0 && idx < 0xc0
+ .quad (idx << PAGE_SHIFT) | PAGE_HYPERVISOR_NOCACHE
.else
- .long (pfn << PAGE_SHIFT) | PAGE_HYPERVISOR | MAP_SMALL_PAGES
+ .quad (idx << PAGE_SHIFT) | PAGE_HYPERVISOR
.endif
- .long 0
- pfn = pfn + 1
+ idx = idx + 1
.endr
.size l1_identmap, . - l1_identmap
-/* Mapping of first 16 megabytes of memory. */
+/*
+ * Space for mapping the first 4GB of memory, with the first 16 megabytes
+ * actualy mapped (mostly using superpages). Uses 4x 4k pages.
+ */
GLOBAL(l2_identmap)
- .quad sym_phys(l1_identmap) + __PAGE_HYPERVISOR
- pfn = 0
+ .quad sym_phys(l1_identmap) + PAGE_HYPERVISOR
+ idx = 1
.rept 7
- pfn = pfn + (1 << PAGETABLE_ORDER)
- .quad (pfn << PAGE_SHIFT) | PAGE_HYPERVISOR | _PAGE_PSE
+ .quad (idx << L2_PAGETABLE_SHIFT) | PAGE_HYPERVISOR | _PAGE_PSE
+ idx = idx + 1
.endr
.fill 4 * L2_PAGETABLE_ENTRIES - 8, 8, 0
.size l2_identmap, . - l2_identmap
+/*
+ * L2 mapping the 1GB Xen text/data/bss region. At boot it maps 16MB from
+ * __image_base__, and is modified when Xen relocates itself. Uses 1x 4k
+ * page.
+ */
GLOBAL(l2_xenmap)
idx = 0
.rept 8
@@ -121,11 +129,12 @@ GLOBAL(l2_xenmap)
.fill L2_PAGETABLE_ENTRIES - 8, 8, 0
.size l2_xenmap, . - l2_xenmap
+/* L2 mapping the fixmap. Uses 1x 4k page. */
l2_fixmap:
idx = 0
.rept L2_PAGETABLE_ENTRIES
.if idx == l2_table_offset(FIXADDR_TOP - 1)
- .quad sym_phys(l1_fixmap) + __PAGE_HYPERVISOR
+ .quad sym_phys(l1_fixmap) + PAGE_HYPERVISOR
.else
.quad 0
.endif
@@ -133,22 +142,24 @@ l2_fixmap:
.endr
.size l2_fixmap, . - l2_fixmap
+/* Identity map, covering the 4 l2_identmap tables. Uses 1x 4k page. */
GLOBAL(l3_identmap)
idx = 0
.rept 4
- .quad sym_phys(l2_identmap) + (idx << PAGE_SHIFT) + __PAGE_HYPERVISOR
+ .quad sym_phys(l2_identmap) + (idx << PAGE_SHIFT) + PAGE_HYPERVISOR
idx = idx + 1
.endr
.fill L3_PAGETABLE_ENTRIES - 4, 8, 0
.size l3_identmap, . - l3_identmap
+/* L3 mapping the fixmap. Uses 1x 4k page. */
l3_xenmap:
idx = 0
.rept L3_PAGETABLE_ENTRIES
.if idx == l3_table_offset(XEN_VIRT_START)
- .quad sym_phys(l2_xenmap) + __PAGE_HYPERVISOR
+ .quad sym_phys(l2_xenmap) + PAGE_HYPERVISOR
.elseif idx == l3_table_offset(FIXADDR_TOP - 1)
- .quad sym_phys(l2_fixmap) + __PAGE_HYPERVISOR
+ .quad sym_phys(l2_fixmap) + PAGE_HYPERVISOR
.else
.quad 0
.endif
@@ -162,9 +173,9 @@ GLOBAL(idle_pg_table)
idx = 1
.rept L4_PAGETABLE_ENTRIES - 1
.if idx == l4_table_offset(DIRECTMAP_VIRT_START)
- .quad sym_phys(l3_identmap) + __PAGE_HYPERVISOR
+ .quad sym_phys(l3_identmap) + PAGE_HYPERVISOR
.elseif idx == l4_table_offset(XEN_VIRT_START)
- .quad sym_phys(l3_xenmap) + __PAGE_HYPERVISOR
+ .quad sym_phys(l3_xenmap) + PAGE_HYPERVISOR
.else
.quad 0
.endif
--
2.1.4
next prev parent reply other threads:[~2016-02-23 16:31 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-23 16:31 [PATCH v2 0/8] Map Xen code/data/bss with superpages Andrew Cooper
2016-02-23 16:31 ` [PATCH v2 1/8] xen/lockprof: Move .lockprofile.data into .rodata Andrew Cooper
2016-02-24 11:16 ` Jan Beulich
2016-02-23 16:31 ` Andrew Cooper [this message]
2016-02-24 11:24 ` [PATCH v2 2/8] xen/x86: Improvements to build-time pagetable generation Jan Beulich
2016-02-24 13:57 ` Andrew Cooper
2016-02-24 14:15 ` Jan Beulich
2016-02-24 14:58 ` Andrew Cooper
2016-02-24 15:18 ` Jan Beulich
2016-02-24 15:22 ` Andrew Cooper
2016-02-24 15:48 ` Jan Beulich
2016-02-24 16:14 ` Andrew Cooper
2016-02-24 16:59 ` Jan Beulich
2016-02-24 17:28 ` Andrew Cooper
2016-02-23 16:31 ` [PATCH v2 3/8] xen/x86: Construct the {l2, l3}_bootmap at compile time Andrew Cooper
2016-02-24 11:34 ` Jan Beulich
2016-02-24 11:40 ` Andrew Cooper
2016-02-24 11:50 ` Jan Beulich
2016-02-24 12:07 ` Andrew Cooper
2016-02-23 16:31 ` [PATCH v2 4/8] xen/memguard: Drop memguard_init() entirely Andrew Cooper
2016-02-24 13:26 ` Jan Beulich
2016-02-24 15:02 ` Stefano Stabellini
2016-02-23 16:31 ` [PATCH v2 5/8] xen/x86: Disable CR0.WP while applying alternatives Andrew Cooper
2016-02-23 16:31 ` [PATCH v2 6/8] xen/x86: Reorder .data and .init when linking Andrew Cooper
2016-02-24 11:41 ` Jan Beulich
2016-02-24 11:44 ` Andrew Cooper
2016-02-23 16:31 ` [PATCH v2 7/8] xen/x86: Use 2M superpages for text/data/bss mappings Andrew Cooper
2016-02-24 13:17 ` Jan Beulich
2016-02-24 13:21 ` Andrew Cooper
2016-02-24 13:23 ` Andrew Cooper
2016-02-23 16:31 ` [PATCH v2 8/8] xen/x86: Unilaterally remove .init mappings Andrew Cooper
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