From: Julien Grall <julien.grall@arm.com>
To: xen-devel@lists.xen.org
Cc: sstabellini@kernel.org, steve.capper@arm.com,
Julien Grall <julien.grall@arm.com>,
shannon.zhao@linaro.org, shankerd@codeaurora.org,
wei.chen@linaro.org
Subject: [PATCH v3 4/9] xen/arm: gic: set_type: Pass the type in parameter rather than in desc->arch.type
Date: Wed, 27 Jul 2016 14:58:25 +0100 [thread overview]
Message-ID: <1469627910-3902-5-git-send-email-julien.grall@arm.com> (raw)
In-Reply-To: <1469627910-3902-1-git-send-email-julien.grall@arm.com>
A follow-up patch will not store the type in desc->arch.type. Also, the
callback prototype is more logical.
Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---
Changes in v3:
- Add Stefano's reviewed-by
Changes in v2:
- gic_set_irq_type has been dropped by mistake in
gic_route_irq_to_xen. Re-add it!
---
xen/arch/arm/gic-v2.c | 3 +--
xen/arch/arm/gic-v3.c | 3 +--
xen/arch/arm/gic.c | 10 +++++-----
xen/include/asm-arm/gic.h | 4 ++--
4 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
index 69ed72d..9bd9d0b 100644
--- a/xen/arch/arm/gic-v2.c
+++ b/xen/arch/arm/gic-v2.c
@@ -236,11 +236,10 @@ static unsigned int gicv2_read_irq(void)
return (readl_gicc(GICC_IAR) & GICC_IA_IRQ);
}
-static void gicv2_set_irq_type(struct irq_desc *desc)
+static void gicv2_set_irq_type(struct irq_desc *desc, unsigned int type)
{
uint32_t cfg, actual, edgebit;
unsigned int irq = desc->irq;
- unsigned int type = desc->arch.type;
spin_lock(&gicv2.lock);
/* Set edge / level */
diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index 781f25c..b8be395 100644
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -471,12 +471,11 @@ static inline uint64_t gicv3_mpidr_to_affinity(int cpu)
MPIDR_AFFINITY_LEVEL(mpidr, 0));
}
-static void gicv3_set_irq_type(struct irq_desc *desc)
+static void gicv3_set_irq_type(struct irq_desc *desc, unsigned int type)
{
uint32_t cfg, actual, edgebit;
void __iomem *base;
unsigned int irq = desc->irq;
- unsigned int type = desc->arch.type;
/* SGI's are always edge-triggered not need to call GICD_ICFGR0 */
ASSERT(irq >= NR_GIC_SGI);
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index c63c862..b9371a7 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -96,12 +96,12 @@ void gic_restore_state(struct vcpu *v)
gic_restore_pending_irqs(v);
}
-static void gic_set_irq_type(struct irq_desc *desc)
+static void gic_set_irq_type(struct irq_desc *desc, unsigned int type)
{
ASSERT(spin_is_locked(&desc->lock));
- ASSERT(desc->arch.type != IRQ_TYPE_INVALID);
+ ASSERT(type != IRQ_TYPE_INVALID);
- gic_hw_ops->set_irq_type(desc);
+ gic_hw_ops->set_irq_type(desc, type);
}
static void gic_set_irq_priority(struct irq_desc *desc, unsigned int priority)
@@ -121,7 +121,7 @@ void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
desc->handler = gic_hw_ops->gic_host_irq_type;
- gic_set_irq_type(desc);
+ gic_set_irq_type(desc, desc->arch.type);
gic_set_irq_priority(desc, priority);
}
@@ -154,7 +154,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int virq,
desc->handler = gic_hw_ops->gic_guest_irq_type;
set_bit(_IRQ_GUEST, &desc->status);
- gic_set_irq_type(desc);
+ gic_set_irq_type(desc, desc->arch.type);
gic_set_irq_priority(desc, priority);
p->desc = desc;
diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
index 3f39f79..2214e87 100644
--- a/xen/include/asm-arm/gic.h
+++ b/xen/include/asm-arm/gic.h
@@ -328,8 +328,8 @@ struct gic_hw_operations {
void (*deactivate_irq)(struct irq_desc *irqd);
/* Read IRQ id and Ack */
unsigned int (*read_irq)(void);
- /* Set IRQ type - type is taken from desc->arch.type */
- void (*set_irq_type)(struct irq_desc *desc);
+ /* Set IRQ type */
+ void (*set_irq_type)(struct irq_desc *desc, unsigned int type);
/* Set IRQ priority */
void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
/* Send SGI */
--
1.9.1
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next prev parent reply other threads:[~2016-07-27 13:58 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-27 13:58 [PATCH v3 0/9] xen/arm: Support SPIs routing Julien Grall
2016-07-27 13:58 ` [PATCH v3 1/9] xen/arm: gic: Consolidate the IRQ affinity set in a single place Julien Grall
2016-07-27 13:58 ` [PATCH v3 2/9] xen/arm: gic: Do not configure affinity during routing Julien Grall
2016-07-27 13:58 ` [PATCH v3 3/9] xen/arm: gic: split set_irq_properties Julien Grall
2016-07-27 13:58 ` Julien Grall [this message]
2016-07-27 13:58 ` [PATCH v3 5/9] xen/arm: gic: Document how gic_set_irq_type should be called Julien Grall
2016-07-27 13:58 ` [PATCH v3 6/9] Revert "xen/arm: warn the user that we cannot route SPIs to Dom0 on ACPI" Julien Grall
2016-07-27 13:58 ` [PATCH v3 7/9] xen/arm: Allow DOM0 to set the IRQ type Julien Grall
2016-07-27 19:22 ` Stefano Stabellini
2016-07-27 13:58 ` [PATCH v3 8/9] xen/arm: acpi: route all unused IRQs to DOM0 Julien Grall
2016-07-27 13:58 ` [PATCH v3 9/9] xen/arm: Fix coding style and update comment in acpi_route_spis Julien Grall
2016-07-27 19:27 ` [PATCH v3 0/9] xen/arm: Support SPIs routing Stefano Stabellini
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