From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: wei.liu2@citrix.com, he.chen@linux.intel.com,
andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com,
Yi Sun <yi.y.sun@linux.intel.com>,
jbeulich@suse.com, chao.p.peng@linux.intel.com
Subject: [PATCH v3 09/15] x86: refactor psr: Implement get value callback function.
Date: Tue, 25 Oct 2016 11:40:57 +0800 [thread overview]
Message-ID: <1477366863-5246-10-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1477366863-5246-1-git-send-email-yi.y.sun@linux.intel.com>
Get feature COS register value is an interface provided by psr.c.
It can be abstracted as another operation.
This patch adds 'get_val' callback function to get the COS register
value of the feature and implement the callback function for L3
CAT/CDP.
It also modifies the domctl interface to make it general.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
---
xen/arch/x86/domctl.c | 18 +++++------
xen/arch/x86/psr.c | 79 ++++++++++++++++++++++++++++-------------------
xen/include/asm-x86/psr.h | 4 +--
3 files changed, 59 insertions(+), 42 deletions(-)
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 2a2fe04..3d7fc34 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1404,23 +1404,23 @@ long arch_do_domctl(
break;
case XEN_DOMCTL_PSR_CAT_OP_GET_L3_CBM:
- ret = psr_get_l3_cbm(d, domctl->u.psr_cat_op.target,
- &domctl->u.psr_cat_op.data,
- PSR_CBM_TYPE_L3);
+ ret = psr_get_val(d, domctl->u.psr_cat_op.target,
+ &domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3);
copyback = 1;
break;
case XEN_DOMCTL_PSR_CAT_OP_GET_L3_CODE:
- ret = psr_get_l3_cbm(d, domctl->u.psr_cat_op.target,
- &domctl->u.psr_cat_op.data,
- PSR_CBM_TYPE_L3_CODE);
+ ret = psr_get_val(d, domctl->u.psr_cat_op.target,
+ &domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3_CODE);
copyback = 1;
break;
case XEN_DOMCTL_PSR_CAT_OP_GET_L3_DATA:
- ret = psr_get_l3_cbm(d, domctl->u.psr_cat_op.target,
- &domctl->u.psr_cat_op.data,
- PSR_CBM_TYPE_L3_DATA);
+ ret = psr_get_val(d, domctl->u.psr_cat_op.target,
+ &domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3_DATA);
copyback = 1;
break;
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index acd180c..b8bb09b 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -52,6 +52,9 @@ struct feat_ops {
/* get_feat_info is used to get feature HW info. */
bool (*get_feat_info)(const struct feat_node *feat, enum cbm_type type,
uint32_t dat[], uint32_t array_len);
+ /* get_val is used to get feature COS register value. */
+ int (*get_val)(const struct feat_node *feat, unsigned int cos,
+ enum cbm_type type, uint64_t *val);
};
/* CAT/CDP HW info data structure. */
@@ -244,9 +247,42 @@ static bool l3_cat_get_feat_info(const struct feat_node *feat,
return true;
}
+static int l3_cat_get_val(const struct feat_node *feat, unsigned int cos,
+ enum cbm_type type, uint64_t *val)
+{
+ if ( cos > feat->info.cos_max )
+ /* Use default value. */
+ cos = 0;
+
+ switch ( type ) {
+ /* CDP */
+ case PSR_CBM_TYPE_L3_DATA:
+ case PSR_CBM_TYPE_L3_CODE:
+ if ( feat->feature != PSR_SOCKET_L3_CDP )
+ return -ENXIO;
+
+ if ( type == PSR_CBM_TYPE_L3_DATA )
+ *val = get_cdp_data(feat, cos);
+ else
+ *val = get_cdp_code(feat, cos);
+ break;
+
+ /* CAT */
+ case PSR_CBM_TYPE_L3:
+ *val = feat->cos_reg_val[cos];
+ break;
+
+ default:
+ return 0;
+ }
+
+ return 1;
+}
+
struct feat_ops l3_cat_ops = {
.init_feature = l3_cat_init_feature,
.get_feat_info = l3_cat_get_feat_info,
+ .get_val = l3_cat_get_val,
};
static unsigned int get_socket_cpu(unsigned int socket)
@@ -486,45 +522,26 @@ int psr_get_info(unsigned int socket, enum cbm_type type,
return -ENOENT;
}
-int psr_get_l3_cbm(struct domain *d, unsigned int socket,
- uint64_t *cbm, enum cbm_type type)
+int psr_get_val(struct domain *d, unsigned int socket,
+ uint64_t *val, enum cbm_type type)
{
- struct psr_cat_socket_info *info = get_cat_socket_info(socket);
- bool_t cdp_enabled = cdp_is_enabled(socket);
+ const struct psr_cat_socket_info *info = get_cat_socket_info(socket);
unsigned int cos = d->arch.psr_cos_ids[socket];
- struct feat_node *feat_tmp;
+ const struct feat_node *feat_tmp;
+ int ret;
if ( IS_ERR(info) )
return PTR_ERR(info);
- feat_tmp = get_feat_l3(info);
- if ( !feat_tmp )
- return -ENOENT;
-
- switch ( type )
+ list_for_each_entry(feat_tmp, &info->feat_list, list)
{
- case PSR_CBM_TYPE_L3:
- if ( cdp_enabled )
- return -EXDEV;
- *cbm = feat_tmp->cos_reg_val[cos];
- break;
+ ret = feat_tmp->ops.get_val(feat_tmp, cos, type, val);
+ if ( ret < 0 )
+ return ret;
- case PSR_CBM_TYPE_L3_CODE:
- if ( !cdp_enabled )
- *cbm = feat_tmp->cos_reg_val[cos];
- else
- *cbm = get_cdp_code(feat_tmp, cos);
- break;
-
- case PSR_CBM_TYPE_L3_DATA:
- if ( !cdp_enabled )
- *cbm = feat_tmp->cos_reg_val[cos];
- else
- *cbm = get_cdp_data(feat_tmp, cos);
- break;
-
- default:
- ASSERT_UNREACHABLE();
+ if ( ret > 0 )
+ /* Found */
+ break;
}
return 0;
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index eccfa75..f2872a2 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -65,8 +65,8 @@ void psr_ctxt_switch_to(struct domain *d);
int psr_get_info(unsigned int socket, enum cbm_type type,
uint32_t dat[], uint32_t array_len);
-int psr_get_l3_cbm(struct domain *d, unsigned int socket,
- uint64_t *cbm, enum cbm_type type);
+int psr_get_val(struct domain *d, unsigned int socket,
+ uint64_t *val, enum cbm_type type);
int psr_set_l3_cbm(struct domain *d, unsigned int socket,
uint64_t cbm, enum cbm_type type);
--
2.7.4
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next prev parent reply other threads:[~2016-10-25 2:34 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-25 3:40 [PATCH v3 00/15] Enable L2 Cache Allocation Technology Yi Sun
2016-10-25 3:40 ` [PATCH v3 01/15] docs: L2 Cache Allocation Technology (CAT) feature document Yi Sun
2016-10-25 13:37 ` Jan Beulich
2016-10-26 1:01 ` Yi Sun
2016-10-30 15:51 ` Meng Xu
2016-11-01 4:40 ` Yi Sun
2016-11-11 21:33 ` Konrad Rzeszutek Wilk
2016-11-14 2:15 ` Yi Sun
2016-11-25 17:19 ` Dario Faggioli
2016-11-29 5:20 ` Yi Sun
2016-11-29 12:25 ` Dario Faggioli
2016-11-25 17:39 ` Dario Faggioli
2016-11-29 4:52 ` Yi Sun
2016-11-29 12:22 ` Dario Faggioli
2016-11-30 1:42 ` Yi Sun
2016-10-25 3:40 ` [PATCH v3 02/15] x86: refactor psr: Split 'ref' out Yi Sun
2016-11-25 15:19 ` Jan Beulich
2016-10-25 3:40 ` [PATCH v3 03/15] x86: refactor psr: Remove 'struct psr_cat_cbm' Yi Sun
2016-11-25 15:45 ` Jan Beulich
2016-10-25 3:40 ` [PATCH v3 04/15] x86: refactor psr: Encapsulate 'cbm_len' and 'cbm_max' Yi Sun
2016-11-25 16:27 ` Jan Beulich
2016-11-25 16:57 ` Jan Beulich
2016-11-29 4:38 ` Yi Sun
2016-11-29 9:43 ` Jan Beulich
2016-11-30 9:08 ` Yi Sun
2016-11-30 9:42 ` Jan Beulich
2016-11-30 10:22 ` Yi Sun
2016-10-25 3:40 ` [PATCH v3 05/15] x86: refactor psr: Use 'feat_mask' to record featues enabled Yi Sun
2016-11-25 16:36 ` Jan Beulich
2016-10-25 3:40 ` [PATCH v3 06/15] x86: refactor psr: Create feature list Yi Sun
2016-10-25 3:40 ` [PATCH v3 07/15] x86: refactor psr: Implement feature operations structure Yi Sun
2016-10-25 3:40 ` [PATCH v3 08/15] x86: refactor psr: Implement get hw info callback function Yi Sun
2016-10-25 3:40 ` Yi Sun [this message]
2016-10-25 3:40 ` [PATCH v3 10/15] x86: refactor psr: Implement function to get the max cos_max Yi Sun
2016-10-25 3:40 ` [PATCH v3 11/15] x86: refactor psr: Implement set value callback function Yi Sun
2016-10-25 3:41 ` [PATCH v3 12/15] x86: Implement L2 CAT in psr.c Yi Sun
2016-10-25 3:41 ` [PATCH v3 13/15] x86: Add L2 CAT interfaces in domctl Yi Sun
2016-10-25 3:41 ` [PATCH v3 14/15] x86: Add L2 CAT interfaces in sysctl Yi Sun
2016-10-25 3:41 ` [PATCH v3 15/15] tools & docs: add L2 CAT support in tools and docs Yi Sun
2016-11-09 1:28 ` [PATCH v3 00/15] Enable L2 Cache Allocation Technology Yi Sun
2016-11-09 8:37 ` Jan Beulich
2016-11-10 1:56 ` Yi Sun
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