[PATCH v2 08/11] pvh/acpi: Handle ACPI accesses for PVH guests

[Boris Ostrovsky <boris.ostrovsky@oracle.com>]

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---
CC: Paul Durrant <paul.durrant@citrix.com>
---
Changes in v2:
* Use 'true/false' values for bools


 xen/arch/x86/hvm/ioreq.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c
index e6ff48f..3ef01cf 100644
--- a/xen/arch/x86/hvm/ioreq.c
+++ b/xen/arch/x86/hvm/ioreq.c
@@ -1383,6 +1383,78 @@ static int hvm_access_cf8(
 static int acpi_ioaccess(
     int dir, unsigned int port, unsigned int bytes, uint32_t *val)
 {
+    unsigned int i;
+    unsigned int bits = bytes * 8;
+    unsigned int idx = port & 3;
+    uint8_t *reg = NULL;
+    bool is_cpu_map = false;
+    struct domain *currd = current->domain;
+
+    BUILD_BUG_ON((ACPI_PM1A_EVT_BLK_LEN != 4) ||
+                 (ACPI_GPE0_BLK_LEN_V1 != 4));
+
+    if ( has_ioreq_cpuhp(currd) )
+        return X86EMUL_UNHANDLEABLE;
+
+    switch (port)
+    {
+    case ACPI_PM1A_EVT_BLK_ADDRESS_V1 ...
+        (ACPI_PM1A_EVT_BLK_ADDRESS_V1 + ACPI_PM1A_EVT_BLK_LEN - 1):
+        reg = currd->arch.hvm_domain.acpi_io.pm1a;
+        break;
+    case ACPI_GPE0_BLK_ADDRESS_V1 ...
+        (ACPI_GPE0_BLK_ADDRESS_V1 + ACPI_GPE0_BLK_LEN_V1 - 1):
+        reg = currd->arch.hvm_domain.acpi_io.gpe;
+        break;
+    case ACPI_CPU_MAP ... (ACPI_CPU_MAP + ACPI_CPU_MAP_LEN - 1):
+        is_cpu_map = true;
+        break;
+    default:
+        return X86EMUL_UNHANDLEABLE;
+    }
+
+    if ( bytes == 0 )
+        return X86EMUL_OKAY;
+
+    if ( dir == IOREQ_READ )
+    {
+        *val &= ~((1U << bits) - 1);
+
+        if ( is_cpu_map )
+        {
+            unsigned int first_bit, last_bit;
+
+            first_bit = (port - ACPI_CPU_MAP) * 8;
+            last_bit = min(currd->arch.avail_vcpus, first_bit + bits);
+            for ( i = first_bit; i < last_bit; i++ )
+                *val |= (1U << (i - first_bit));
+        }
+        else
+            memcpy(val, &reg[idx], bytes);
+    }
+    else
+    {
+        if ( is_cpu_map )
+            /*
+             * CPU map is only read by DSDT's PRSC method and should never
+             * be written by a guest.
+             */
+            return X86EMUL_UNHANDLEABLE;
+
+        /* Write either status or enable reegister. */
+        if ( (bytes > 2) || ((bytes == 2) && (port & 1)) )
+            return X86EMUL_UNHANDLEABLE;
+
+        if ( idx < 2 ) /* status, write 1 to clear. */
+        {
+            reg[idx] &= ~(*val & 0xff);
+            if ( bytes == 2 )
+                reg[idx + 1] &= ~((*val >> 8) & 0xff);
+        }
+        else           /* enable */
+            memcpy(&reg[idx], val, bytes);
+    }
+
     return X86EMUL_OKAY;
 }
 
-- 
2.7.4


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