From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xen.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Paul Durrant <paul.durrant@citrix.com>,
Jan Beulich <JBeulich@suse.com>
Subject: [PATCH 6/8] x86/emul: Support speculative MSR reads
Date: Mon, 5 Dec 2016 10:09:29 +0000 [thread overview]
Message-ID: <1480932571-23547-7-git-send-email-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <1480932571-23547-1-git-send-email-andrew.cooper3@citrix.com>
Update the read_msr() hook to take an additional parameter, indicating that
there should be no side effects of the read.
No functional change.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Paul Durrant <paul.durrant@citrix.com>
---
xen/arch/x86/hvm/emulate.c | 3 ++-
xen/arch/x86/x86_emulate/x86_emulate.c | 24 ++++++++++++------------
xen/arch/x86/x86_emulate/x86_emulate.h | 6 +++++-
3 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index b182d57..bce0b00 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -1529,11 +1529,12 @@ static int hvmemul_write_cr(
static int hvmemul_read_msr(
unsigned int reg,
uint64_t *val,
+ bool speculative,
struct x86_emulate_ctxt *ctxt)
{
int rc = hvm_msr_read_intercept(reg, val);
- if ( rc == X86EMUL_EXCEPTION )
+ if ( rc == X86EMUL_EXCEPTION && !speculative )
x86_emul_hw_exception(TRAP_gp_fault, 0, ctxt);
return rc;
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 877023d..5cba7ec 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1319,7 +1319,7 @@ in_longmode(
uint64_t efer;
if ( !ops->read_msr ||
- unlikely(ops->read_msr(MSR_EFER, &efer, ctxt) != X86EMUL_OKAY) )
+ unlikely(ops->read_msr(MSR_EFER, &efer, false, ctxt) != X86EMUL_OKAY) )
return -1;
return !!(efer & EFER_LMA);
@@ -4412,7 +4412,7 @@ x86_emulate(
{
uint64_t tsc_aux;
fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr(MSR_TSC_AUX, &tsc_aux, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_TSC_AUX, &tsc_aux, false, ctxt)) != 0 )
goto done;
_regs.ecx = (uint32_t)tsc_aux;
goto rdtsc;
@@ -4548,11 +4548,11 @@ x86_emulate(
/* Inject #UD if syscall/sysret are disabled. */
fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr(MSR_EFER, &msr_content, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_EFER, &msr_content, false, ctxt)) != 0 )
goto done;
generate_exception_if((msr_content & EFER_SCE) == 0, EXC_UD);
- if ( (rc = ops->read_msr(MSR_STAR, &msr_content, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_STAR, &msr_content, false, ctxt)) != 0 )
goto done;
cs.sel = (msr_content >> 32) & ~3; /* SELECTOR_RPL_MASK */
@@ -4574,11 +4574,11 @@ x86_emulate(
_regs.r11 = _regs.eflags & ~EFLG_RF;
if ( (rc = ops->read_msr(mode_64bit() ? MSR_LSTAR : MSR_CSTAR,
- &msr_content, ctxt)) != 0 )
+ &msr_content, false, ctxt)) != 0 )
goto done;
_regs.rip = msr_content;
- if ( (rc = ops->read_msr(MSR_FMASK, &msr_content, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_FMASK, &msr_content, false, ctxt)) != 0 )
goto done;
_regs.eflags &= ~(msr_content | EFLG_RF);
}
@@ -4793,7 +4793,7 @@ x86_emulate(
generate_exception_if(cr4 & CR4_TSD, EXC_GP, 0);
}
fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr(MSR_TSC, &val, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_TSC, &val, false, ctxt)) != 0 )
goto done;
_regs.edx = (uint32_t)(val >> 32);
_regs.eax = (uint32_t)(val >> 0);
@@ -4804,7 +4804,7 @@ x86_emulate(
uint64_t val;
generate_exception_if(!mode_ring0(), EXC_GP, 0);
fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr((uint32_t)_regs.ecx, &val, ctxt)) != 0 )
+ if ( (rc = ops->read_msr((uint32_t)_regs.ecx, &val, false, ctxt)) != 0 )
goto done;
_regs.edx = (uint32_t)(val >> 32);
_regs.eax = (uint32_t)(val >> 0);
@@ -4825,7 +4825,7 @@ x86_emulate(
generate_exception_if(!in_protmode(ctxt, ops), EXC_GP, 0);
fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr(MSR_SYSENTER_CS, &msr_content, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_SYSENTER_CS, &msr_content, false, ctxt)) != 0 )
goto done;
generate_exception_if(!(msr_content & 0xfffc), EXC_GP, 0);
@@ -4853,11 +4853,11 @@ x86_emulate(
(rc = ops->write_segment(x86_seg_ss, &sreg, ctxt)) != 0 )
goto done;
- if ( (rc = ops->read_msr(MSR_SYSENTER_EIP, &msr_content, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_SYSENTER_EIP, &msr_content, false, ctxt)) != 0 )
goto done;
_regs.eip = lm ? msr_content : (uint32_t)msr_content;
- if ( (rc = ops->read_msr(MSR_SYSENTER_ESP, &msr_content, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_SYSENTER_ESP, &msr_content, false, ctxt)) != 0 )
goto done;
_regs.esp = lm ? msr_content : (uint32_t)msr_content;
@@ -4873,7 +4873,7 @@ x86_emulate(
generate_exception_if(!in_protmode(ctxt, ops), EXC_GP, 0);
fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr(MSR_SYSENTER_CS, &msr_content, ctxt)) != 0 )
+ if ( (rc = ops->read_msr(MSR_SYSENTER_CS, &msr_content, false, ctxt)) != 0 )
goto done;
generate_exception_if(!(msr_content & 0xfffc), EXC_GP, 0);
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h
index 164fc24..89cf20d 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.h
+++ b/xen/arch/x86/x86_emulate/x86_emulate.h
@@ -372,15 +372,19 @@ struct x86_emulate_ops
/*
* read_msr: Read from model-specific register.
* @reg: [IN ] Register to read.
+ * @val: [OUT] Value read (only valid on X86EMUL_OKAY)
+ * @speculative [IN] Speculative read?
*/
int (*read_msr)(
unsigned int reg,
uint64_t *val,
+ bool speculative,
struct x86_emulate_ctxt *ctxt);
/*
- * write_dr: Write to model-specific register.
+ * write_msr: Write to model-specific register.
* @reg: [IN ] Register to write.
+ * @val: [IN ] Value to write.
*/
int (*write_msr)(
unsigned int reg,
--
2.1.4
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next prev parent reply other threads:[~2016-12-05 10:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-05 10:09 [PATCH 0/8] Misc further emulation work Andrew Cooper
2016-12-05 10:09 ` [PATCH 1/8] x86/shadow: Drop stale adjustment in the PAE second-half search Andrew Cooper
2016-12-05 10:16 ` Tim Deegan
2016-12-05 13:07 ` Andrew Cooper
2016-12-05 10:09 ` [PATCH 2/8] x86/emul: Debugging improvements to the test harness Andrew Cooper
2016-12-05 12:00 ` Jan Beulich
2016-12-05 13:08 ` Andrew Cooper
2016-12-05 10:09 ` [PATCH 3/8] x86/hvm: Assert some expectations in hvm_inject_event() Andrew Cooper
2016-12-05 12:01 ` Jan Beulich
2016-12-05 10:09 ` [PATCH 4/8] x86/emul: Drop the last remaining uses of bool_t Andrew Cooper
2016-12-05 12:02 ` Jan Beulich
2016-12-05 10:09 ` [PATCH 5/8] x86/hvm: Don't raise #GP behind the emulators back for MSR accesses Andrew Cooper
2016-12-05 12:10 ` Jan Beulich
2016-12-05 16:29 ` Andrew Cooper
2016-12-05 17:08 ` Jan Beulich
2016-12-06 6:16 ` Tian, Kevin
2016-12-05 10:09 ` Andrew Cooper [this message]
2016-12-05 13:03 ` [PATCH 6/8] x86/emul: Support speculative MSR reads Paul Durrant
2016-12-05 13:25 ` Jan Beulich
2016-12-05 10:09 ` [PATCH 7/8] x86/emul: Support CPUID fauilting via a speculative MSR read Andrew Cooper
2016-12-05 13:06 ` Paul Durrant
2016-12-05 13:35 ` Jan Beulich
2016-12-05 10:09 ` [PATCH 8/8] x86/emul: Implement the STAC and CLAC instructions Andrew Cooper
2016-12-05 13:45 ` Jan Beulich
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