* [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3
@ 2016-12-07 12:33 Julien Grall
2016-12-07 12:33 ` [PATCH 01/13] xen/arm: vtimer: Switch the emulation functions return from int to bool Julien Grall
` (13 more replies)
0 siblings, 14 replies; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
Hi all,
Currently, it is only possible to start AArch32 guest with GICv2. This means
that if the host interrupt controller is not compatible with GICv2, it will
not be possible to boot AArch32 guest.
The vGICv3 code is nearly fully compatible with AArch32 guest except that
co-processor access to ICC_SGI1R_EL1 is not emulated.
The first part (#1 - #11) of the series contains clean-up, only patch #12 and
#13 contains the meat.
Note this is only allowing AArch32 guest to use GICv3 on AArch64 host. This
series does not add support for GICv3 on AArch32 host.
A branch with all the patches can be found on xenbits:
git://xenbits.xen.org/people/julieng/xen-unstable.git branch gicv3-32bit-v1
Regards,
Julien Grall (13):
xen/arm: vtimer: Switch the emulation functions return from int to
bool
xen/arm: vtimer: Switch the read variable in the emulation from int to
bool
xen/arm: traps: Switch from bool_t to bool
xen/arm: vgic: Switch from bool_t to bool
xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate
up to...
xen/arm: vgic: Switch emulate_sysreg return from int to bool
xen/arm: vgic: Clean-up the sysreg emulation
xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled.
xen/arm: vtimer: Move emulate_sysreg* callback in a separate header
xen/arm: vreg: Introduce vreg_emulate_cp{32,64}
xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg
xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate
helper
xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3
xen/arch/arm/Makefile | 2 +-
xen/arch/arm/traps.c | 42 +++++++------
xen/arch/arm/vgic-v2.c | 4 +-
xen/arch/arm/vgic-v3.c | 64 ++++++++++++++++----
xen/arch/arm/vgic.c | 22 +++----
xen/arch/arm/vtimer.c | 126 ++++++++-------------------------------
xen/arch/arm/vtimer.h | 2 +-
xen/include/asm-arm/cpregs.h | 3 +
xen/include/asm-arm/perfc_defn.h | 2 +
xen/include/asm-arm/vgic.h | 20 +++----
xen/include/asm-arm/vreg.h | 110 ++++++++++++++++++++++++++++++++++
11 files changed, 240 insertions(+), 157 deletions(-)
create mode 100644 xen/include/asm-arm/vreg.h
--
1.9.1
_______________________________________________
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Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH 01/13] xen/arm: vtimer: Switch the emulation functions return from int to bool
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 21:44 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 02/13] xen/arm: vtimer: Switch the read variable in the emulation " Julien Grall
` (12 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
The emulation functions are always returning 0 or 1. Use bool instead to
make clear only two possible values exist.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vtimer.c | 60 +++++++++++++++++++++++++--------------------------
xen/arch/arm/vtimer.h | 2 +-
2 files changed, 31 insertions(+), 31 deletions(-)
diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index f636705..f8d3295 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -164,12 +164,12 @@ int virt_timer_restore(struct vcpu *v)
return 0;
}
-static int vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
+static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
{
struct vcpu *v = current;
if ( !ACCESS_ALLOWED(regs, EL0PTEN) )
- return 0;
+ return false;
if ( read )
{
@@ -190,16 +190,16 @@ static int vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
else
stop_timer(&v->arch.phys_timer.timer);
}
- return 1;
+ return true;
}
-static int vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
+static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
{
struct vcpu *v = current;
s_time_t now;
if ( !ACCESS_ALLOWED(regs, EL0PTEN) )
- return 0;
+ return false;
now = NOW() - v->domain->arch.phys_timer_base.offset;
@@ -218,15 +218,15 @@ static int vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
v->domain->arch.phys_timer_base.offset);
}
}
- return 1;
+ return true;
}
-static int vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
+static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
{
struct vcpu *v = current;
if ( !ACCESS_ALLOWED(regs, EL0PTEN) )
- return 0;
+ return false;
if ( read )
{
@@ -243,10 +243,10 @@ static int vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
v->domain->arch.phys_timer_base.offset);
}
}
- return 1;
+ return true;
}
-static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
+static bool vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
{
struct hsr_cp32 cp32 = hsr.cp32;
/*
@@ -255,7 +255,7 @@ static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
* setting r).
*/
uint32_t r = 0;
- int res;
+ bool res;
if ( cp32.read )
@@ -277,7 +277,7 @@ static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
break;
default:
- return 0;
+ return false;
}
if ( res && cp32.read )
@@ -286,7 +286,7 @@ static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
return res;
}
-static int vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
+static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
{
struct hsr_cp64 cp64 = hsr.cp64;
uint32_t r1 = get_user_reg(regs, cp64.reg1);
@@ -302,11 +302,11 @@ static int vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
{
case HSR_CPREG64(CNTP_CVAL):
if ( !vtimer_cntp_cval(regs, &x, cp64.read) )
- return 0;
+ return false;
break;
default:
- return 0;
+ return false;
}
if ( cp64.read )
@@ -315,21 +315,21 @@ static int vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
set_user_reg(regs, cp64.reg2, x >> 32);
}
- return 1;
+ return true;
}
#ifdef CONFIG_ARM_64
-typedef int (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
- int read);
-typedef int (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
- int read);
+typedef bool (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
+ int read);
+typedef bool (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
+ int read);
-static int vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
- vtimer_sysreg32_fn_t fn)
+static bool vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
+ vtimer_sysreg32_fn_t fn)
{
struct hsr_sysreg sysreg = hsr.sysreg;
uint32_t r = 0;
- int ret;
+ bool ret;
if ( !sysreg.read )
r = get_user_reg(regs, sysreg.reg);
@@ -342,8 +342,8 @@ static int vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
return ret;
}
-static int vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
- vtimer_sysreg64_fn_t fn)
+static bool vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
+ vtimer_sysreg64_fn_t fn)
{
struct hsr_sysreg sysreg = hsr.sysreg;
/*
@@ -352,7 +352,7 @@ static int vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
* setting x).
*/
uint64_t x = 0;
- int ret;
+ bool ret;
if ( !sysreg.read )
x = get_user_reg(regs, sysreg.reg);
@@ -365,7 +365,7 @@ static int vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
return ret;
}
-static int vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
+static bool vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
{
struct hsr_sysreg sysreg = hsr.sysreg;
@@ -384,13 +384,13 @@ static int vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
return vtimer_emulate_sysreg64(regs, hsr, vtimer_cntp_cval);
default:
- return 0;
+ return false;
}
}
#endif
-int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr)
+bool vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr)
{
switch (hsr.ec) {
@@ -403,7 +403,7 @@ int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr)
return vtimer_emulate_sysreg(regs, hsr);
#endif
default:
- return 0;
+ return false;
}
}
diff --git a/xen/arch/arm/vtimer.h b/xen/arch/arm/vtimer.h
index 99e8145..5aaddc6 100644
--- a/xen/arch/arm/vtimer.h
+++ b/xen/arch/arm/vtimer.h
@@ -23,7 +23,7 @@
extern int domain_vtimer_init(struct domain *d,
struct xen_arch_domainconfig *config);
extern int vcpu_vtimer_init(struct vcpu *v);
-extern int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr);
+extern bool vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr);
extern int virt_timer_save(struct vcpu *v);
extern int virt_timer_restore(struct vcpu *v);
extern void vcpu_timer_destroy(struct vcpu *v);
--
1.9.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 02/13] xen/arm: vtimer: Switch the read variable in the emulation from int to bool
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
2016-12-07 12:33 ` [PATCH 01/13] xen/arm: vtimer: Switch the emulation functions return from int to bool Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 21:49 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 03/13] xen/arm: traps: Switch from bool_t " Julien Grall
` (11 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
The read variable can only take two values: 1 => read, 0 => write. Use
bool instead to make clear the variable can only take 2 values.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vtimer.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index f8d3295..3fc97b3 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -164,7 +164,7 @@ int virt_timer_restore(struct vcpu *v)
return 0;
}
-static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
+static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, bool read)
{
struct vcpu *v = current;
@@ -193,7 +193,8 @@ static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
return true;
}
-static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
+static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r,
+ bool read)
{
struct vcpu *v = current;
s_time_t now;
@@ -221,7 +222,8 @@ static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
return true;
}
-static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
+static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r,
+ bool read)
{
struct vcpu *v = current;
@@ -320,9 +322,9 @@ static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
#ifdef CONFIG_ARM_64
typedef bool (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
- int read);
+ bool read);
typedef bool (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
- int read);
+ bool read);
static bool vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
vtimer_sysreg32_fn_t fn)
--
1.9.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 03/13] xen/arm: traps: Switch from bool_t to bool
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
2016-12-07 12:33 ` [PATCH 01/13] xen/arm: vtimer: Switch the emulation functions return from int to bool Julien Grall
2016-12-07 12:33 ` [PATCH 02/13] xen/arm: vtimer: Switch the read variable in the emulation " Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 21:51 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 04/13] xen/arm: vgic: " Julien Grall
` (10 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
Since commit 9202342 "xen/build: Use C99 booleans", bool_t is an alias
to bool. Going forward, there is a preference to use bool rather than
bool_t. Also replace 0 and 1 by true and false when relevant.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/traps.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index ae921d7..fb07ae1 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -154,13 +154,13 @@ static void print_xen_info(void)
}
#ifdef CONFIG_ARM_32
-static inline bool_t is_zero_register(int reg)
+static inline bool is_zero_register(int reg)
{
/* There is no zero register for ARM32 */
- return 0;
+ return false;
}
#else
-static inline bool_t is_zero_register(int reg)
+static inline bool is_zero_register(int reg)
{
/*
* For store/load and sysreg instruction, the encoding 31 always
@@ -1500,7 +1500,7 @@ static void do_trap_hypercall(struct cpu_user_regs *regs, register_t *nr,
#endif
}
-static bool_t check_multicall_32bit_clean(struct multicall_entry *multi)
+static bool check_multicall_32bit_clean(struct multicall_entry *multi)
{
int i;
@@ -1661,7 +1661,7 @@ static void advance_pc(struct cpu_user_regs *regs, const union hsr hsr)
/* Read as zero and write ignore */
static void handle_raz_wi(struct cpu_user_regs *regs,
int regidx,
- bool_t read,
+ bool read,
const union hsr hsr,
int min_el)
{
@@ -1680,7 +1680,7 @@ static void handle_raz_wi(struct cpu_user_regs *regs,
/* Write only as write ignore */
static void handle_wo_wi(struct cpu_user_regs *regs,
int regidx,
- bool_t read,
+ bool read,
const union hsr hsr,
int min_el)
{
@@ -1699,7 +1699,7 @@ static void handle_wo_wi(struct cpu_user_regs *regs,
/* Read only as read as zero */
static void handle_ro_raz(struct cpu_user_regs *regs,
int regidx,
- bool_t read,
+ bool read,
const union hsr hsr,
int min_el)
{
--
1.9.1
_______________________________________________
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Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 04/13] xen/arm: vgic: Switch from bool_t to bool
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (2 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 03/13] xen/arm: traps: Switch from bool_t " Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 21:53 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 05/13] xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to Julien Grall
` (9 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
Since commit 9202342 "xen/build: Use C99 booleans", bool_t is an alias
to bool. Going forward, therer is a preference to use bool rather than
bool_t. Also replace 0 and 1 by false and true when relevant.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vgic.c | 8 ++++----
xen/include/asm-arm/vgic.h | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 0965119..84735a9 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -482,7 +482,7 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int virq)
uint8_t priority;
struct pending_irq *iter, *n = irq_to_pending(v, virq);
unsigned long flags;
- bool_t running;
+ bool running;
priority = vgic_get_virq_priority(v, virq);
@@ -555,15 +555,15 @@ int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
return v->domain->arch.vgic.handler->emulate_sysreg(regs, hsr);
}
-bool_t vgic_reserve_virq(struct domain *d, unsigned int virq)
+bool vgic_reserve_virq(struct domain *d, unsigned int virq)
{
if ( virq >= vgic_num_irqs(d) )
- return 0;
+ return false;
return !test_and_set_bit(virq, d->arch.vgic.allocated_irqs);
}
-int vgic_allocate_virq(struct domain *d, bool_t spi)
+int vgic_allocate_virq(struct domain *d, bool spi)
{
int first, end;
unsigned int virq;
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 300f461..1f371c8 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -315,23 +315,23 @@ extern int vgic_to_sgi(struct vcpu *v, register_t sgir,
extern void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq);
/* Reserve a specific guest vIRQ */
-extern bool_t vgic_reserve_virq(struct domain *d, unsigned int virq);
+extern bool vgic_reserve_virq(struct domain *d, unsigned int virq);
/*
* Allocate a guest VIRQ
* - spi == 0 => allocate a PPI. It will be the same on every vCPU
* - spi == 1 => allocate an SPI
*/
-extern int vgic_allocate_virq(struct domain *d, bool_t spi);
+extern int vgic_allocate_virq(struct domain *d, bool spi);
static inline int vgic_allocate_ppi(struct domain *d)
{
- return vgic_allocate_virq(d, 0 /* ppi */);
+ return vgic_allocate_virq(d, false /* ppi */);
}
static inline int vgic_allocate_spi(struct domain *d)
{
- return vgic_allocate_virq(d, 1 /* spi */);
+ return vgic_allocate_virq(d, true /* spi */);
}
extern void vgic_free_virq(struct domain *d, unsigned int virq);
--
1.9.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 05/13] xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to...
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (3 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 04/13] xen/arm: vgic: " Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 21:55 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 06/13] xen/arm: vgic: Switch emulate_sysreg return from int to bool Julien Grall
` (8 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
vgic_v{2,3}_to_sgi.
vgic_*to_sgi functions can only return 2 values: 0 or 1. Use bool instead
to make clear only two possible values exist.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vgic-v2.c | 4 ++--
xen/arch/arm/vgic-v3.c | 2 +-
xen/arch/arm/vgic.c | 8 ++++----
xen/include/asm-arm/vgic.h | 6 +++---
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c
index c6d280e..3dbcfe8 100644
--- a/xen/arch/arm/vgic-v2.c
+++ b/xen/arch/arm/vgic-v2.c
@@ -374,7 +374,7 @@ read_reserved:
return 1;
}
-static int vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
+static bool vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
{
int virq;
@@ -403,7 +403,7 @@ static int vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
printk(XENLOG_G_DEBUG
"%pv: vGICD: unhandled GICD_SGIR write %"PRIregister" with wrong mode\n",
v, sgir);
- return 0;
+ return false;
}
return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index ec038a3..17c3000 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1269,7 +1269,7 @@ write_reserved:
return 1;
}
-static int vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
+static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
{
int virq;
int irqmode;
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 84735a9..3e1774d 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -393,8 +393,8 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n)
}
}
-int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int virq,
- const struct sgi_target *target)
+bool vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode,
+ int virq, const struct sgi_target *target)
{
struct domain *d = v->domain;
int vcpuid;
@@ -440,10 +440,10 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int
gprintk(XENLOG_WARNING,
"vGICD:unhandled GICD_SGIR write %"PRIregister" \
with wrong mode\n", sgir);
- return 0;
+ return false;
}
- return 1;
+ return true;
}
struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq)
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 1f371c8..83843fa 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -309,9 +309,9 @@ int vgic_v3_init(struct domain *d, int *mmio_count);
extern int domain_vgic_register(struct domain *d, int *mmio_count);
extern int vcpu_vgic_free(struct vcpu *v);
-extern int vgic_to_sgi(struct vcpu *v, register_t sgir,
- enum gic_sgi_mode irqmode, int virq,
- const struct sgi_target *target);
+extern bool vgic_to_sgi(struct vcpu *v, register_t sgir,
+ enum gic_sgi_mode irqmode, int virq,
+ const struct sgi_target *target);
extern void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq);
/* Reserve a specific guest vIRQ */
--
1.9.1
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^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 06/13] xen/arm: vgic: Switch emulate_sysreg return from int to bool
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (4 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 05/13] xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:02 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 07/13] xen/arm: vgic: Clean-up the sysreg emulation Julien Grall
` (7 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
emulate_sysreg callback can only return 2 values: 0 or 1. Use bool
instead to make clear only two possible values exist.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vgic-v3.c | 6 +++---
xen/arch/arm/vgic.c | 2 +-
xen/include/asm-arm/vgic.h | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 17c3000..e54df0b 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1300,7 +1300,7 @@ static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
}
-static int vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
+static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
{
struct vcpu *v = current;
struct hsr_sysreg sysreg = hsr.sysreg;
@@ -1321,10 +1321,10 @@ static int vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
else
{
gprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
- return 0;
+ return false;
}
default:
- return 0;
+ return false;
}
}
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 3e1774d..196e86b 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -546,7 +546,7 @@ void arch_evtchn_inject(struct vcpu *v)
vgic_vcpu_inject_irq(v, v->domain->arch.evtchn_irq);
}
-int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
+bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
{
struct vcpu *v = current;
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 83843fa..fadb1e1 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -131,7 +131,7 @@ struct vgic_ops {
/* Release resources that were allocated by domain_init */
void (*domain_free)(struct domain *d);
/* vGIC sysreg emulation */
- int (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
+ bool (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
/* Maximum number of vCPU supported */
const unsigned int max_vcpus;
};
@@ -300,7 +300,7 @@ extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq);
extern struct pending_irq *spi_to_pending(struct domain *d, unsigned int irq);
extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n, int s);
extern struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq);
-extern int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr);
+extern bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr);
extern void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n);
extern void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n);
extern void register_vgic_ops(struct domain *d, const struct vgic_ops *ops);
--
1.9.1
_______________________________________________
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https://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 07/13] xen/arm: vgic: Clean-up the sysreg emulation
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (5 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 06/13] xen/arm: vgic: Switch emulate_sysreg return from int to bool Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:08 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 08/13] xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled Julien Grall
` (6 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
Couple of clean-up for the vgic sysreg emulation:
- Reference the public documentation rather than a non-public one
- Let the vgic emulation decides whether a register needs to be
emulated
- Drop unnecessary debug printk. They don't bring much information
and can be misleading (vGICv2 does not support thoses registers)
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/traps.c | 16 ++++------------
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index fb07ae1..1fe02cb 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -2261,23 +2261,15 @@ static void do_sysreg(struct cpu_user_regs *regs,
/*
* HCR_EL2.FMO or HCR_EL2.IMO
*
- * ARMv8: GIC Architecture Specification (PRD03-GENC-010745 24.0)
- * Section 4.6.8.
+ * GIC Architecture Specification (IHI 0069C): Section 4.6.3
*/
case HSR_SYSREG_ICC_SGI1R_EL1:
+ case HSR_SYSREG_ICC_ASGI1R_EL1:
+ case HSR_SYSREG_ICC_SGI0R_EL1:
+
if ( !vgic_emulate(regs, hsr) )
- {
- dprintk(XENLOG_WARNING,
- "failed emulation of sysreg ICC_SGI1R_EL1 access\n");
return inject_undef64_exception(regs, hsr.len);
- }
break;
- case HSR_SYSREG_ICC_SGI0R_EL1:
- case HSR_SYSREG_ICC_ASGI1R_EL1:
- /* TBD: Implement to support secure grp0/1 SGI forwarding */
- dprintk(XENLOG_WARNING,
- "Emulation of sysreg ICC_SGI0R_EL1/ASGI1R_EL1 not supported\n");
- return inject_undef64_exception(regs, hsr.len);
/*
* ICC_SRE_EL2.Enable = 0
--
1.9.1
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^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 08/13] xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled.
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (6 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 07/13] xen/arm: vgic: Clean-up the sysreg emulation Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:23 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 09/13] xen/arm: vtimer: Move emulate_sysreg* callback in a separate header Julien Grall
` (5 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
The vGICv3 depends whether Xen has a host driver for GICv3, not on the
architecture (AArch64 vs AArch32).
Note CONFIG_HAS_GICV3 is enabled only when for ARM64 build, so there is
no functional change.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index f165178..59b3b53 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -43,7 +43,7 @@ obj-y += time.o
obj-y += traps.o
obj-y += vgic.o
obj-y += vgic-v2.o
-obj-$(CONFIG_ARM_64) += vgic-v3.o
+obj-$(CONFIG_HAS_GICV3) += vgic-v3.o
obj-y += vm_event.o
obj-y += vtimer.o
obj-y += vpsci.o
--
1.9.1
_______________________________________________
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https://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 09/13] xen/arm: vtimer: Move emulate_sysreg* callback in a separate header
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (7 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 08/13] xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:41 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 10/13] xen/arm: vreg: Introduce vreg_emulate_cp{32, 64} Julien Grall
` (4 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
The core emulation of sysreg (reading/writing registers) is not specific
to the virtual timer. Move the helpers in a new header vreg.h.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
The helpers will be necessary in a follow-up patch to emulate sysreg
for another components.
---
xen/arch/arm/vtimer.c | 53 ++++---------------------------------------
xen/include/asm-arm/vreg.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 60 insertions(+), 49 deletions(-)
create mode 100644 xen/include/asm-arm/vreg.h
diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index 3fc97b3..091b5e7 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -27,6 +27,7 @@
#include <asm/time.h>
#include <asm/gic.h>
#include <asm/vgic.h>
+#include <asm/vreg.h>
#include <asm/regs.h>
/*
@@ -321,52 +322,6 @@ static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
}
#ifdef CONFIG_ARM_64
-typedef bool (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
- bool read);
-typedef bool (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
- bool read);
-
-static bool vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
- vtimer_sysreg32_fn_t fn)
-{
- struct hsr_sysreg sysreg = hsr.sysreg;
- uint32_t r = 0;
- bool ret;
-
- if ( !sysreg.read )
- r = get_user_reg(regs, sysreg.reg);
-
- ret = fn(regs, &r, sysreg.read);
-
- if ( ret && sysreg.read )
- set_user_reg(regs, sysreg.reg, r);
-
- return ret;
-}
-
-static bool vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
- vtimer_sysreg64_fn_t fn)
-{
- struct hsr_sysreg sysreg = hsr.sysreg;
- /*
- * Initialize to zero to avoid leaking data if there is an
- * implementation error in the emulation (such as not correctly
- * setting x).
- */
- uint64_t x = 0;
- bool ret;
-
- if ( !sysreg.read )
- x = get_user_reg(regs, sysreg.reg);
-
- ret = fn(regs, &x, sysreg.read);
-
- if ( ret && sysreg.read )
- set_user_reg(regs, sysreg.reg, x);
-
- return ret;
-}
-
static bool vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
{
struct hsr_sysreg sysreg = hsr.sysreg;
@@ -379,11 +334,11 @@ static bool vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
switch ( hsr.bits & HSR_SYSREG_REGS_MASK )
{
case HSR_SYSREG_CNTP_CTL_EL0:
- return vtimer_emulate_sysreg32(regs, hsr, vtimer_cntp_ctl);
+ return vreg_emulate_sysreg32(regs, hsr, vtimer_cntp_ctl);
case HSR_SYSREG_CNTP_TVAL_EL0:
- return vtimer_emulate_sysreg32(regs, hsr, vtimer_cntp_tval);
+ return vreg_emulate_sysreg32(regs, hsr, vtimer_cntp_tval);
case HSR_SYSREG_CNTP_CVAL_EL0:
- return vtimer_emulate_sysreg64(regs, hsr, vtimer_cntp_cval);
+ return vreg_emulate_sysreg64(regs, hsr, vtimer_cntp_cval);
default:
return false;
diff --git a/xen/include/asm-arm/vreg.h b/xen/include/asm-arm/vreg.h
new file mode 100644
index 0000000..2671f6e
--- /dev/null
+++ b/xen/include/asm-arm/vreg.h
@@ -0,0 +1,56 @@
+/*
+ * Helpers to emulate co-processor and system registers
+ */
+#ifndef __ASM_ARM_VREG__
+#define __ASM_ARM_VREG__
+
+#ifdef CONFIG_ARM_64
+typedef bool (*vreg_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
+ bool read);
+typedef bool (*vreg_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
+ bool read);
+
+static inline bool vreg_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
+ vreg_sysreg32_fn_t fn)
+{
+ struct hsr_sysreg sysreg = hsr.sysreg;
+ uint32_t r = 0;
+ bool ret;
+
+ if ( !sysreg.read )
+ r = get_user_reg(regs, sysreg.reg);
+
+ ret = fn(regs, &r, sysreg.read);
+
+ if ( ret && sysreg.read )
+ set_user_reg(regs, sysreg.reg, r);
+
+ return ret;
+}
+
+static inline bool vreg_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
+ vreg_sysreg64_fn_t fn)
+{
+ struct hsr_sysreg sysreg = hsr.sysreg;
+ /*
+ * Initialize to zero to avoid leaking data if there is an
+ * implementation error in the emulation (such as not correctly
+ * setting x).
+ */
+ uint64_t x = 0;
+ bool ret;
+
+ if ( !sysreg.read )
+ x = get_user_reg(regs, sysreg.reg);
+
+ ret = fn(regs, &x, sysreg.read);
+
+ if ( ret && sysreg.read )
+ set_user_reg(regs, sysreg.reg, x);
+
+ return ret;
+}
+
+#endif
+
+#endif /* __ASM_ARM_VREG__ */
--
1.9.1
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^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 10/13] xen/arm: vreg: Introduce vreg_emulate_cp{32, 64}
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (8 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 09/13] xen/arm: vtimer: Move emulate_sysreg* callback in a separate header Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:41 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg Julien Grall
` (3 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
Factorize the code to emulate 32-bit and 64-bit access to a co-processor
in specific helpers.
The new helpers will be used in different components to simplify the
emulation.
Finally, the prototypes for the callbacks to emulate 32-bit and 64-bit
co-processor access are the same as the sysreg one. Rather than
introducing new ones, repurpose the existent prototypes.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vtimer.c | 37 +++------------------------
xen/include/asm-arm/vreg.h | 64 ++++++++++++++++++++++++++++++++++++++++++----
2 files changed, 62 insertions(+), 39 deletions(-)
diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index 091b5e7..4ec3b95 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -252,49 +252,28 @@ static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r,
static bool vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
{
struct hsr_cp32 cp32 = hsr.cp32;
- /*
- * Initialize to zero to avoid leaking data if there is an
- * implementation error in the emulation (such as not correctly
- * setting r).
- */
- uint32_t r = 0;
- bool res;
-
if ( cp32.read )
perfc_incr(vtimer_cp32_reads);
else
perfc_incr(vtimer_cp32_writes);
- if ( !cp32.read )
- r = get_user_reg(regs, cp32.reg);
-
switch ( hsr.bits & HSR_CP32_REGS_MASK )
{
case HSR_CPREG32(CNTP_CTL):
- res = vtimer_cntp_ctl(regs, &r, cp32.read);
- break;
+ return vreg_emulate_cp32(regs, hsr, vtimer_cntp_ctl);
case HSR_CPREG32(CNTP_TVAL):
- res = vtimer_cntp_tval(regs, &r, cp32.read);
- break;
+ return vreg_emulate_cp32(regs, hsr, vtimer_cntp_tval);
default:
return false;
}
-
- if ( res && cp32.read )
- set_user_reg(regs, cp32.reg, r);
-
- return res;
}
static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
{
struct hsr_cp64 cp64 = hsr.cp64;
- uint32_t r1 = get_user_reg(regs, cp64.reg1);
- uint32_t r2 = get_user_reg(regs, cp64.reg2);
- uint64_t x = (uint64_t)r1 | ((uint64_t)r2 << 32);
if ( cp64.read )
perfc_incr(vtimer_cp64_reads);
@@ -304,21 +283,11 @@ static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
switch ( hsr.bits & HSR_CP64_REGS_MASK )
{
case HSR_CPREG64(CNTP_CVAL):
- if ( !vtimer_cntp_cval(regs, &x, cp64.read) )
- return false;
- break;
+ return vreg_emulate_cp64(regs, hsr, vtimer_cntp_cval);
default:
return false;
}
-
- if ( cp64.read )
- {
- set_user_reg(regs, cp64.reg1, x & 0xffffffff);
- set_user_reg(regs, cp64.reg2, x >> 32);
- }
-
- return true;
}
#ifdef CONFIG_ARM_64
diff --git a/xen/include/asm-arm/vreg.h b/xen/include/asm-arm/vreg.h
index 2671f6e..ed2bd6f 100644
--- a/xen/include/asm-arm/vreg.h
+++ b/xen/include/asm-arm/vreg.h
@@ -4,14 +4,68 @@
#ifndef __ASM_ARM_VREG__
#define __ASM_ARM_VREG__
-#ifdef CONFIG_ARM_64
-typedef bool (*vreg_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
+typedef bool (*vreg_reg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
bool read);
-typedef bool (*vreg_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
+typedef bool (*vreg_reg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
bool read);
+static inline bool vreg_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr,
+ vreg_reg32_fn_t fn)
+{
+ struct hsr_cp32 cp32 = hsr.cp32;
+ /*
+ * Initialize to zero to avoid leaking data if there is an
+ * implementation error in the emulation (such as not correctly
+ * setting r).
+ */
+ uint32_t r = 0;
+ bool ret;
+
+ if ( !cp32.read )
+ r = get_user_reg(regs, cp32.reg);
+
+ ret = fn(regs, &r, cp32.read);
+
+ if ( ret && cp32.read )
+ set_user_reg(regs, cp32.reg, r);
+
+ return ret;
+}
+
+static inline bool vreg_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr,
+ vreg_reg64_fn_t fn)
+{
+ struct hsr_cp64 cp64 = hsr.cp64;
+ /*
+ * Initialize to zero to avoid leaking data if there is an
+ * implementation error in the emulation (such as not correctly
+ * setting x).
+ */
+ uint64_t x = 0;
+ bool ret;
+
+ if ( !cp64.read )
+ {
+ uint32_t r1 = get_user_reg(regs, cp64.reg1);
+ uint32_t r2 = get_user_reg(regs, cp64.reg2);
+
+ x = (uint64_t)r1 | ((uint64_t)r2 << 32);
+ }
+
+ ret = fn(regs, &x, cp64.read);
+
+ if ( ret && cp64.read )
+ {
+ set_user_reg(regs, cp64.reg1, x & 0xffffffff);
+ set_user_reg(regs, cp64.reg2, x >> 32);
+ }
+
+ return ret;
+}
+
+#ifdef CONFIG_ARM_64
static inline bool vreg_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
- vreg_sysreg32_fn_t fn)
+ vreg_reg32_fn_t fn)
{
struct hsr_sysreg sysreg = hsr.sysreg;
uint32_t r = 0;
@@ -29,7 +83,7 @@ static inline bool vreg_emulate_sysreg32(struct cpu_user_regs *regs, union hsr h
}
static inline bool vreg_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
- vreg_sysreg64_fn_t fn)
+ vreg_reg64_fn_t fn)
{
struct hsr_sysreg sysreg = hsr.sysreg;
/*
--
1.9.1
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^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (9 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 10/13] xen/arm: vreg: Introduce vreg_emulate_cp{32, 64} Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:44 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 12/13] xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate helper Julien Grall
` (2 subsequent siblings)
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
We will want to emulate co-processor registers access in a follow-up
patch.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vgic-v3.c | 13 ++++++++++++-
xen/arch/arm/vgic.c | 4 ++--
xen/include/asm-arm/vgic.h | 4 ++--
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index e54df0b..f3f0bd2 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1328,6 +1328,17 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
}
}
+static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr)
+{
+ switch (hsr.ec)
+ {
+ case HSR_EC_SYSREG:
+ return vgic_v3_emulate_sysreg(regs, hsr);
+ default:
+ return false;
+ }
+}
+
static const struct mmio_handler_ops vgic_rdistr_mmio_handler = {
.read = vgic_v3_rdistr_mmio_read,
.write = vgic_v3_rdistr_mmio_write,
@@ -1491,7 +1502,7 @@ static const struct vgic_ops v3_ops = {
.vcpu_init = vgic_v3_vcpu_init,
.domain_init = vgic_v3_domain_init,
.domain_free = vgic_v3_domain_free,
- .emulate_sysreg = vgic_v3_emulate_sysreg,
+ .emulate_reg = vgic_v3_emulate_reg,
/*
* We use both AFF1 and AFF0 in (v)MPIDR. Thus, the max number of CPU
* that can be supported is up to 4096(==256*16) in theory.
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 196e86b..364d5f0 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -550,9 +550,9 @@ bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
{
struct vcpu *v = current;
- ASSERT(v->domain->arch.vgic.handler->emulate_sysreg != NULL);
+ ASSERT(v->domain->arch.vgic.handler->emulate_reg != NULL);
- return v->domain->arch.vgic.handler->emulate_sysreg(regs, hsr);
+ return v->domain->arch.vgic.handler->emulate_reg(regs, hsr);
}
bool vgic_reserve_virq(struct domain *d, unsigned int virq)
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index fadb1e1..672f649 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -130,8 +130,8 @@ struct vgic_ops {
int (*domain_init)(struct domain *d);
/* Release resources that were allocated by domain_init */
void (*domain_free)(struct domain *d);
- /* vGIC sysreg emulation */
- bool (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
+ /* vGIC sysreg/cpregs emulate */
+ bool (*emulate_reg)(struct cpu_user_regs *regs, union hsr hsr);
/* Maximum number of vCPU supported */
const unsigned int max_vcpus;
};
--
1.9.1
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^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH 12/13] xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate helper
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (10 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:47 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 13/13] xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3 Julien Grall
2016-12-07 22:51 ` [PATCH 00/13] xen/arm: Allow AArch32 guest to boot " Stefano Stabellini
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
The emulation of the co-processor register ICC_SGI1R is the same as the
system register ICC_SGI1R_EL1. So move the emulation outside and use the
newly introduced helper vreg_emulate_sysreg64 to abstract the access.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/vgic-v3.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index f3f0bd2..f23135d 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -31,6 +31,7 @@
#include <asm/gic_v3_defs.h>
#include <asm/vgic.h>
#include <asm/vgic-emul.h>
+#include <asm/vreg.h>
/*
* PIDR2: Only bits[7:4] are not implementation defined. We are
@@ -1300,9 +1301,21 @@ static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
}
+static bool vgic_v3_emulate_sgi1r(struct cpu_user_regs *regs, uint64_t *r,
+ bool read)
+{
+ /* WO */
+ if ( !read )
+ return vgic_v3_to_sgi(current, *r);
+ else
+ {
+ gdprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
+ return false;
+ }
+}
+
static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
{
- struct vcpu *v = current;
struct hsr_sysreg sysreg = hsr.sysreg;
ASSERT (hsr.ec == HSR_EC_SYSREG);
@@ -1315,14 +1328,8 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
switch ( hsr.bits & HSR_SYSREG_REGS_MASK )
{
case HSR_SYSREG_ICC_SGI1R_EL1:
- /* WO */
- if ( !sysreg.read )
- return vgic_v3_to_sgi(v, get_user_reg(regs, sysreg.reg));
- else
- {
- gprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
- return false;
- }
+ return vreg_emulate_sysreg64(regs, hsr, vgic_v3_emulate_sgi1r);
+
default:
return false;
}
--
1.9.1
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* [PATCH 13/13] xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (11 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 12/13] xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate helper Julien Grall
@ 2016-12-07 12:33 ` Julien Grall
2016-12-07 22:50 ` Stefano Stabellini
2016-12-07 22:51 ` [PATCH 00/13] xen/arm: Allow AArch32 guest to boot " Stefano Stabellini
13 siblings, 1 reply; 30+ messages in thread
From: Julien Grall @ 2016-12-07 12:33 UTC (permalink / raw)
To: xen-devel; +Cc: Julien Grall, sstabellini
AArch32 guest will use co-processor registers to access the GICv3 (see
8.5 in IHI 0069C). Some of the registers have to be trapped and emulated
(e.g ICC_SGI1R), this is the purpose of this patch.
The rest of the emulation already supports access required for AArch32
so nothing has to be changed there.
Note this is only enabling 32-bit guest using GICv3 on Xen ARM64. Further
work would be required to compile GICv3 and vGICv3 for Xen ARM32.
Signed-off-by: Julien Grall <julien.grall@arm.com>
---
xen/arch/arm/traps.c | 12 ++++++++++++
xen/arch/arm/vgic-v3.c | 20 ++++++++++++++++++++
xen/include/asm-arm/cpregs.h | 3 +++
xen/include/asm-arm/perfc_defn.h | 2 ++
4 files changed, 37 insertions(+)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 1fe02cb..eb85d92 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1876,6 +1876,18 @@ static void do_cp15_64(struct cpu_user_regs *regs,
break;
/*
+ * HCR_EL2.FMO or HCR_EL2.IMO
+ *
+ * GIC Architecture Specification (IHI 0069C): Section 4.6.3
+ */
+ case HSR_CPREG64(ICC_SGI1R):
+ case HSR_CPREG64(ICC_ASGI1R):
+ case HSR_CPREG64(ICC_SGI0R):
+ if ( !vgic_emulate(regs, hsr) )
+ return inject_undef_exception(regs, hsr);
+ break;
+
+ /*
* CPTR_EL2.T{0..9,12..13}
*
* ARMv7 (DDI 0406C.b): B1.14.12
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index f23135d..22c8ce0 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1335,12 +1335,32 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
}
}
+static bool vgic_v3_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
+{
+ struct hsr_cp64 cp64 = hsr.cp64;
+
+ if ( cp64.read )
+ perfc_incr(vgic_cp64_reads);
+ else
+ perfc_incr(vgic_cp64_writes);
+
+ switch ( hsr.bits & HSR_CP64_REGS_MASK )
+ {
+ case HSR_CPREG64(ICC_SGI1R):
+ return vreg_emulate_cp64(regs, hsr, vgic_v3_emulate_sgi1r);
+ default:
+ return false;
+ }
+}
+
static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr)
{
switch (hsr.ec)
{
case HSR_EC_SYSREG:
return vgic_v3_emulate_sysreg(regs, hsr);
+ case HSR_EC_CP15_64:
+ return vgic_v3_emulate_cp64(regs, hsr);
default:
return false;
}
diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h
index e5cb00c..af45ec7 100644
--- a/xen/include/asm-arm/cpregs.h
+++ b/xen/include/asm-arm/cpregs.h
@@ -246,6 +246,9 @@
/* CP15 CR11: DMA Operations for TCM Access */
/* CP15 CR12: */
+#define ICC_SGI1R p15,0,c12 /* Interrupt Controller SGI Group 1 */
+#define ICC_ASGI1R p15,1,c12 /* Interrupt Controller Alias SGI Group 1 Register */
+#define ICC_SGI0R p15,2,c12 /* Interrupt Controller SGI Group 0 */
#define VBAR p15,0,c12,c0,0 /* Vector Base Address Register */
#define HVBAR p15,4,c12,c0,0 /* Hyp. Vector Base Address Register */
diff --git a/xen/include/asm-arm/perfc_defn.h b/xen/include/asm-arm/perfc_defn.h
index 69fabe7..5f957ee 100644
--- a/xen/include/asm-arm/perfc_defn.h
+++ b/xen/include/asm-arm/perfc_defn.h
@@ -38,6 +38,8 @@ PERFCOUNTER(vgicd_reads, "vgicd: read")
PERFCOUNTER(vgicd_writes, "vgicd: write")
PERFCOUNTER(vgicr_reads, "vgicr: read")
PERFCOUNTER(vgicr_writes, "vgicr: write")
+PERFCOUNTER(vgic_cp64_reads, "vgic: cp64 read")
+PERFCOUNTER(vgic_cp64_writes, "vgic: cp64 write")
PERFCOUNTER(vgic_sysreg_reads, "vgic: sysreg read")
PERFCOUNTER(vgic_sysreg_writes, "vgic: sysreg write")
PERFCOUNTER(vgic_sgi_list , "vgic: SGI send to list")
--
1.9.1
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^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH 01/13] xen/arm: vtimer: Switch the emulation functions return from int to bool
2016-12-07 12:33 ` [PATCH 01/13] xen/arm: vtimer: Switch the emulation functions return from int to bool Julien Grall
@ 2016-12-07 21:44 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 21:44 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> The emulation functions are always returning 0 or 1. Use bool instead to
> make clear only two possible values exist.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> xen/arch/arm/vtimer.c | 60 +++++++++++++++++++++++++--------------------------
> xen/arch/arm/vtimer.h | 2 +-
> 2 files changed, 31 insertions(+), 31 deletions(-)
>
> diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
> index f636705..f8d3295 100644
> --- a/xen/arch/arm/vtimer.c
> +++ b/xen/arch/arm/vtimer.c
> @@ -164,12 +164,12 @@ int virt_timer_restore(struct vcpu *v)
> return 0;
> }
>
> -static int vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
> +static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
> {
> struct vcpu *v = current;
>
> if ( !ACCESS_ALLOWED(regs, EL0PTEN) )
> - return 0;
> + return false;
>
> if ( read )
> {
> @@ -190,16 +190,16 @@ static int vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
> else
> stop_timer(&v->arch.phys_timer.timer);
> }
> - return 1;
> + return true;
> }
>
> -static int vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
> +static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
> {
> struct vcpu *v = current;
> s_time_t now;
>
> if ( !ACCESS_ALLOWED(regs, EL0PTEN) )
> - return 0;
> + return false;
>
> now = NOW() - v->domain->arch.phys_timer_base.offset;
>
> @@ -218,15 +218,15 @@ static int vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
> v->domain->arch.phys_timer_base.offset);
> }
> }
> - return 1;
> + return true;
> }
>
> -static int vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
> +static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
> {
> struct vcpu *v = current;
>
> if ( !ACCESS_ALLOWED(regs, EL0PTEN) )
> - return 0;
> + return false;
>
> if ( read )
> {
> @@ -243,10 +243,10 @@ static int vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
> v->domain->arch.phys_timer_base.offset);
> }
> }
> - return 1;
> + return true;
> }
>
> -static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
> +static bool vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct hsr_cp32 cp32 = hsr.cp32;
> /*
> @@ -255,7 +255,7 @@ static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
> * setting r).
> */
> uint32_t r = 0;
> - int res;
> + bool res;
>
>
> if ( cp32.read )
> @@ -277,7 +277,7 @@ static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
> break;
>
> default:
> - return 0;
> + return false;
> }
>
> if ( res && cp32.read )
> @@ -286,7 +286,7 @@ static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
> return res;
> }
>
> -static int vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> +static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct hsr_cp64 cp64 = hsr.cp64;
> uint32_t r1 = get_user_reg(regs, cp64.reg1);
> @@ -302,11 +302,11 @@ static int vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> {
> case HSR_CPREG64(CNTP_CVAL):
> if ( !vtimer_cntp_cval(regs, &x, cp64.read) )
> - return 0;
> + return false;
> break;
>
> default:
> - return 0;
> + return false;
> }
>
> if ( cp64.read )
> @@ -315,21 +315,21 @@ static int vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> set_user_reg(regs, cp64.reg2, x >> 32);
> }
>
> - return 1;
> + return true;
> }
>
> #ifdef CONFIG_ARM_64
> -typedef int (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
> - int read);
> -typedef int (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
> - int read);
> +typedef bool (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
> + int read);
> +typedef bool (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
> + int read);
>
> -static int vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
> - vtimer_sysreg32_fn_t fn)
> +static bool vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
> + vtimer_sysreg32_fn_t fn)
> {
> struct hsr_sysreg sysreg = hsr.sysreg;
> uint32_t r = 0;
> - int ret;
> + bool ret;
>
> if ( !sysreg.read )
> r = get_user_reg(regs, sysreg.reg);
> @@ -342,8 +342,8 @@ static int vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
> return ret;
> }
>
> -static int vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
> - vtimer_sysreg64_fn_t fn)
> +static bool vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
> + vtimer_sysreg64_fn_t fn)
> {
> struct hsr_sysreg sysreg = hsr.sysreg;
> /*
> @@ -352,7 +352,7 @@ static int vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
> * setting x).
> */
> uint64_t x = 0;
> - int ret;
> + bool ret;
>
> if ( !sysreg.read )
> x = get_user_reg(regs, sysreg.reg);
> @@ -365,7 +365,7 @@ static int vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
> return ret;
> }
>
> -static int vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> +static bool vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct hsr_sysreg sysreg = hsr.sysreg;
>
> @@ -384,13 +384,13 @@ static int vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> return vtimer_emulate_sysreg64(regs, hsr, vtimer_cntp_cval);
>
> default:
> - return 0;
> + return false;
> }
>
> }
> #endif
>
> -int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr)
> +bool vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr)
> {
>
> switch (hsr.ec) {
> @@ -403,7 +403,7 @@ int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr)
> return vtimer_emulate_sysreg(regs, hsr);
> #endif
> default:
> - return 0;
> + return false;
> }
> }
>
> diff --git a/xen/arch/arm/vtimer.h b/xen/arch/arm/vtimer.h
> index 99e8145..5aaddc6 100644
> --- a/xen/arch/arm/vtimer.h
> +++ b/xen/arch/arm/vtimer.h
> @@ -23,7 +23,7 @@
> extern int domain_vtimer_init(struct domain *d,
> struct xen_arch_domainconfig *config);
> extern int vcpu_vtimer_init(struct vcpu *v);
> -extern int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr);
> +extern bool vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr);
> extern int virt_timer_save(struct vcpu *v);
> extern int virt_timer_restore(struct vcpu *v);
> extern void vcpu_timer_destroy(struct vcpu *v);
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 02/13] xen/arm: vtimer: Switch the read variable in the emulation from int to bool
2016-12-07 12:33 ` [PATCH 02/13] xen/arm: vtimer: Switch the read variable in the emulation " Julien Grall
@ 2016-12-07 21:49 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 21:49 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> The read variable can only take two values: 1 => read, 0 => write. Use
> bool instead to make clear the variable can only take 2 values.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> xen/arch/arm/vtimer.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
> index f8d3295..3fc97b3 100644
> --- a/xen/arch/arm/vtimer.c
> +++ b/xen/arch/arm/vtimer.c
> @@ -164,7 +164,7 @@ int virt_timer_restore(struct vcpu *v)
> return 0;
> }
>
> -static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
> +static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, bool read)
> {
> struct vcpu *v = current;
>
> @@ -193,7 +193,8 @@ static bool vtimer_cntp_ctl(struct cpu_user_regs *regs, uint32_t *r, int read)
> return true;
> }
>
> -static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
> +static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r,
> + bool read)
> {
> struct vcpu *v = current;
> s_time_t now;
> @@ -221,7 +222,8 @@ static bool vtimer_cntp_tval(struct cpu_user_regs *regs, uint32_t *r, int read)
> return true;
> }
>
> -static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
> +static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r,
> + bool read)
> {
> struct vcpu *v = current;
>
> @@ -320,9 +322,9 @@ static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
>
> #ifdef CONFIG_ARM_64
> typedef bool (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
> - int read);
> + bool read);
> typedef bool (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
> - int read);
> + bool read);
>
> static bool vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
> vtimer_sysreg32_fn_t fn)
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 03/13] xen/arm: traps: Switch from bool_t to bool
2016-12-07 12:33 ` [PATCH 03/13] xen/arm: traps: Switch from bool_t " Julien Grall
@ 2016-12-07 21:51 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 21:51 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> Since commit 9202342 "xen/build: Use C99 booleans", bool_t is an alias
> to bool. Going forward, there is a preference to use bool rather than
> bool_t. Also replace 0 and 1 by true and false when relevant.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/traps.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index ae921d7..fb07ae1 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -154,13 +154,13 @@ static void print_xen_info(void)
> }
>
> #ifdef CONFIG_ARM_32
> -static inline bool_t is_zero_register(int reg)
> +static inline bool is_zero_register(int reg)
> {
> /* There is no zero register for ARM32 */
> - return 0;
> + return false;
> }
> #else
> -static inline bool_t is_zero_register(int reg)
> +static inline bool is_zero_register(int reg)
> {
> /*
> * For store/load and sysreg instruction, the encoding 31 always
> @@ -1500,7 +1500,7 @@ static void do_trap_hypercall(struct cpu_user_regs *regs, register_t *nr,
> #endif
> }
>
> -static bool_t check_multicall_32bit_clean(struct multicall_entry *multi)
> +static bool check_multicall_32bit_clean(struct multicall_entry *multi)
> {
> int i;
>
> @@ -1661,7 +1661,7 @@ static void advance_pc(struct cpu_user_regs *regs, const union hsr hsr)
> /* Read as zero and write ignore */
> static void handle_raz_wi(struct cpu_user_regs *regs,
> int regidx,
> - bool_t read,
> + bool read,
> const union hsr hsr,
> int min_el)
> {
> @@ -1680,7 +1680,7 @@ static void handle_raz_wi(struct cpu_user_regs *regs,
> /* Write only as write ignore */
> static void handle_wo_wi(struct cpu_user_regs *regs,
> int regidx,
> - bool_t read,
> + bool read,
> const union hsr hsr,
> int min_el)
> {
> @@ -1699,7 +1699,7 @@ static void handle_wo_wi(struct cpu_user_regs *regs,
> /* Read only as read as zero */
> static void handle_ro_raz(struct cpu_user_regs *regs,
> int regidx,
> - bool_t read,
> + bool read,
> const union hsr hsr,
> int min_el)
> {
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 04/13] xen/arm: vgic: Switch from bool_t to bool
2016-12-07 12:33 ` [PATCH 04/13] xen/arm: vgic: " Julien Grall
@ 2016-12-07 21:53 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 21:53 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> Since commit 9202342 "xen/build: Use C99 booleans", bool_t is an alias
> to bool. Going forward, therer is a preference to use bool rather than
> bool_t. Also replace 0 and 1 by false and true when relevant.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/vgic.c | 8 ++++----
> xen/include/asm-arm/vgic.h | 8 ++++----
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 0965119..84735a9 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -482,7 +482,7 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int virq)
> uint8_t priority;
> struct pending_irq *iter, *n = irq_to_pending(v, virq);
> unsigned long flags;
> - bool_t running;
> + bool running;
>
> priority = vgic_get_virq_priority(v, virq);
>
> @@ -555,15 +555,15 @@ int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
> return v->domain->arch.vgic.handler->emulate_sysreg(regs, hsr);
> }
>
> -bool_t vgic_reserve_virq(struct domain *d, unsigned int virq)
> +bool vgic_reserve_virq(struct domain *d, unsigned int virq)
> {
> if ( virq >= vgic_num_irqs(d) )
> - return 0;
> + return false;
>
> return !test_and_set_bit(virq, d->arch.vgic.allocated_irqs);
> }
>
> -int vgic_allocate_virq(struct domain *d, bool_t spi)
> +int vgic_allocate_virq(struct domain *d, bool spi)
> {
> int first, end;
> unsigned int virq;
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index 300f461..1f371c8 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -315,23 +315,23 @@ extern int vgic_to_sgi(struct vcpu *v, register_t sgir,
> extern void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq);
>
> /* Reserve a specific guest vIRQ */
> -extern bool_t vgic_reserve_virq(struct domain *d, unsigned int virq);
> +extern bool vgic_reserve_virq(struct domain *d, unsigned int virq);
>
> /*
> * Allocate a guest VIRQ
> * - spi == 0 => allocate a PPI. It will be the same on every vCPU
> * - spi == 1 => allocate an SPI
> */
> -extern int vgic_allocate_virq(struct domain *d, bool_t spi);
> +extern int vgic_allocate_virq(struct domain *d, bool spi);
>
> static inline int vgic_allocate_ppi(struct domain *d)
> {
> - return vgic_allocate_virq(d, 0 /* ppi */);
> + return vgic_allocate_virq(d, false /* ppi */);
> }
>
> static inline int vgic_allocate_spi(struct domain *d)
> {
> - return vgic_allocate_virq(d, 1 /* spi */);
> + return vgic_allocate_virq(d, true /* spi */);
> }
>
> extern void vgic_free_virq(struct domain *d, unsigned int virq);
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 05/13] xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to...
2016-12-07 12:33 ` [PATCH 05/13] xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to Julien Grall
@ 2016-12-07 21:55 ` Stefano Stabellini
2016-12-07 22:02 ` Stefano Stabellini
0 siblings, 1 reply; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 21:55 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> vgic_v{2,3}_to_sgi.
>
> vgic_*to_sgi functions can only return 2 values: 0 or 1. Use bool instead
> to make clear only two possible values exist.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/vgic-v2.c | 4 ++--
> xen/arch/arm/vgic-v3.c | 2 +-
> xen/arch/arm/vgic.c | 8 ++++----
> xen/include/asm-arm/vgic.h | 6 +++---
> 4 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c
> index c6d280e..3dbcfe8 100644
> --- a/xen/arch/arm/vgic-v2.c
> +++ b/xen/arch/arm/vgic-v2.c
> @@ -374,7 +374,7 @@ read_reserved:
> return 1;
> }
>
> -static int vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
> +static bool vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
> {
>
> int virq;
> @@ -403,7 +403,7 @@ static int vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
> printk(XENLOG_G_DEBUG
> "%pv: vGICD: unhandled GICD_SGIR write %"PRIregister" with wrong mode\n",
> v, sgir);
> - return 0;
> + return false;
> }
>
> return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index ec038a3..17c3000 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -1269,7 +1269,7 @@ write_reserved:
> return 1;
> }
>
> -static int vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
> +static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
> {
> int virq;
> int irqmode;
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 84735a9..3e1774d 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -393,8 +393,8 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n)
> }
> }
>
> -int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int virq,
> - const struct sgi_target *target)
> +bool vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode,
> + int virq, const struct sgi_target *target)
> {
> struct domain *d = v->domain;
> int vcpuid;
> @@ -440,10 +440,10 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int
> gprintk(XENLOG_WARNING,
> "vGICD:unhandled GICD_SGIR write %"PRIregister" \
> with wrong mode\n", sgir);
> - return 0;
> + return false;
> }
>
> - return 1;
> + return true;
> }
>
> struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq)
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index 1f371c8..83843fa 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -309,9 +309,9 @@ int vgic_v3_init(struct domain *d, int *mmio_count);
>
> extern int domain_vgic_register(struct domain *d, int *mmio_count);
> extern int vcpu_vgic_free(struct vcpu *v);
> -extern int vgic_to_sgi(struct vcpu *v, register_t sgir,
> - enum gic_sgi_mode irqmode, int virq,
> - const struct sgi_target *target);
> +extern bool vgic_to_sgi(struct vcpu *v, register_t sgir,
> + enum gic_sgi_mode irqmode, int virq,
> + const struct sgi_target *target);
> extern void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq);
>
> /* Reserve a specific guest vIRQ */
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 05/13] xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to...
2016-12-07 21:55 ` Stefano Stabellini
@ 2016-12-07 22:02 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:02 UTC (permalink / raw)
To: Stefano Stabellini; +Cc: Julien Grall, xen-devel
On Wed, 7 Dec 2016, Stefano Stabellini wrote:
> On Wed, 7 Dec 2016, Julien Grall wrote:
> > vgic_v{2,3}_to_sgi.
> >
> > vgic_*to_sgi functions can only return 2 values: 0 or 1. Use bool instead
> > to make clear only two possible values exist.
> >
> > Signed-off-by: Julien Grall <julien.grall@arm.com>
>
> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Actually, you missed one see below.
> > ---
> > xen/arch/arm/vgic-v2.c | 4 ++--
> > xen/arch/arm/vgic-v3.c | 2 +-
> > xen/arch/arm/vgic.c | 8 ++++----
> > xen/include/asm-arm/vgic.h | 6 +++---
> > 4 files changed, 10 insertions(+), 10 deletions(-)
> >
> > diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c
> > index c6d280e..3dbcfe8 100644
> > --- a/xen/arch/arm/vgic-v2.c
> > +++ b/xen/arch/arm/vgic-v2.c
> > @@ -374,7 +374,7 @@ read_reserved:
> > return 1;
> > }
> >
> > -static int vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
> > +static bool vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
> > {
> >
> > int virq;
> > @@ -403,7 +403,7 @@ static int vgic_v2_to_sgi(struct vcpu *v, register_t sgir)
> > printk(XENLOG_G_DEBUG
> > "%pv: vGICD: unhandled GICD_SGIR write %"PRIregister" with wrong mode\n",
> > v, sgir);
> > - return 0;
> > + return false;
> > }
> >
> > return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
> > diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> > index ec038a3..17c3000 100644
> > --- a/xen/arch/arm/vgic-v3.c
> > +++ b/xen/arch/arm/vgic-v3.c
> > @@ -1269,7 +1269,7 @@ write_reserved:
> > return 1;
> > }
> >
> > -static int vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
> > +static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
> > {
> > int virq;
> > int irqmode;
You missed a 0 to false change here, if you don't mind, I'll do it.
> > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> > index 84735a9..3e1774d 100644
> > --- a/xen/arch/arm/vgic.c
> > +++ b/xen/arch/arm/vgic.c
> > @@ -393,8 +393,8 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n)
> > }
> > }
> >
> > -int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int virq,
> > - const struct sgi_target *target)
> > +bool vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode,
> > + int virq, const struct sgi_target *target)
> > {
> > struct domain *d = v->domain;
> > int vcpuid;
> > @@ -440,10 +440,10 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int
> > gprintk(XENLOG_WARNING,
> > "vGICD:unhandled GICD_SGIR write %"PRIregister" \
> > with wrong mode\n", sgir);
> > - return 0;
> > + return false;
> > }
> >
> > - return 1;
> > + return true;
> > }
> >
> > struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq)
> > diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> > index 1f371c8..83843fa 100644
> > --- a/xen/include/asm-arm/vgic.h
> > +++ b/xen/include/asm-arm/vgic.h
> > @@ -309,9 +309,9 @@ int vgic_v3_init(struct domain *d, int *mmio_count);
> >
> > extern int domain_vgic_register(struct domain *d, int *mmio_count);
> > extern int vcpu_vgic_free(struct vcpu *v);
> > -extern int vgic_to_sgi(struct vcpu *v, register_t sgir,
> > - enum gic_sgi_mode irqmode, int virq,
> > - const struct sgi_target *target);
> > +extern bool vgic_to_sgi(struct vcpu *v, register_t sgir,
> > + enum gic_sgi_mode irqmode, int virq,
> > + const struct sgi_target *target);
> > extern void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq);
> >
> > /* Reserve a specific guest vIRQ */
> > --
> > 1.9.1
> >
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 06/13] xen/arm: vgic: Switch emulate_sysreg return from int to bool
2016-12-07 12:33 ` [PATCH 06/13] xen/arm: vgic: Switch emulate_sysreg return from int to bool Julien Grall
@ 2016-12-07 22:02 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:02 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> emulate_sysreg callback can only return 2 values: 0 or 1. Use bool
> instead to make clear only two possible values exist.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> xen/arch/arm/vgic-v3.c | 6 +++---
> xen/arch/arm/vgic.c | 2 +-
> xen/include/asm-arm/vgic.h | 4 ++--
> 3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index 17c3000..e54df0b 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -1300,7 +1300,7 @@ static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
> return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
> }
>
> -static int vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> +static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct vcpu *v = current;
> struct hsr_sysreg sysreg = hsr.sysreg;
> @@ -1321,10 +1321,10 @@ static int vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> else
> {
> gprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
> - return 0;
> + return false;
> }
> default:
> - return 0;
> + return false;
> }
> }
>
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 3e1774d..196e86b 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -546,7 +546,7 @@ void arch_evtchn_inject(struct vcpu *v)
> vgic_vcpu_inject_irq(v, v->domain->arch.evtchn_irq);
> }
>
> -int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
> +bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct vcpu *v = current;
>
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index 83843fa..fadb1e1 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -131,7 +131,7 @@ struct vgic_ops {
> /* Release resources that were allocated by domain_init */
> void (*domain_free)(struct domain *d);
> /* vGIC sysreg emulation */
> - int (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
> + bool (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
> /* Maximum number of vCPU supported */
> const unsigned int max_vcpus;
> };
> @@ -300,7 +300,7 @@ extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq);
> extern struct pending_irq *spi_to_pending(struct domain *d, unsigned int irq);
> extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n, int s);
> extern struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq);
> -extern int vgic_emulate(struct cpu_user_regs *regs, union hsr hsr);
> +extern bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr);
> extern void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n);
> extern void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n);
> extern void register_vgic_ops(struct domain *d, const struct vgic_ops *ops);
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 07/13] xen/arm: vgic: Clean-up the sysreg emulation
2016-12-07 12:33 ` [PATCH 07/13] xen/arm: vgic: Clean-up the sysreg emulation Julien Grall
@ 2016-12-07 22:08 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:08 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> Couple of clean-up for the vgic sysreg emulation:
> - Reference the public documentation rather than a non-public one
> - Let the vgic emulation decides whether a register needs to be
> emulated
> - Drop unnecessary debug printk. They don't bring much information
> and can be misleading (vGICv2 does not support thoses registers)
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Aside from a couple of typos in the commit message that I'll fix.
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> xen/arch/arm/traps.c | 16 ++++------------
> 1 file changed, 4 insertions(+), 12 deletions(-)
>
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index fb07ae1..1fe02cb 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -2261,23 +2261,15 @@ static void do_sysreg(struct cpu_user_regs *regs,
> /*
> * HCR_EL2.FMO or HCR_EL2.IMO
> *
> - * ARMv8: GIC Architecture Specification (PRD03-GENC-010745 24.0)
> - * Section 4.6.8.
> + * GIC Architecture Specification (IHI 0069C): Section 4.6.3
> */
> case HSR_SYSREG_ICC_SGI1R_EL1:
> + case HSR_SYSREG_ICC_ASGI1R_EL1:
> + case HSR_SYSREG_ICC_SGI0R_EL1:
> +
> if ( !vgic_emulate(regs, hsr) )
> - {
> - dprintk(XENLOG_WARNING,
> - "failed emulation of sysreg ICC_SGI1R_EL1 access\n");
> return inject_undef64_exception(regs, hsr.len);
> - }
> break;
> - case HSR_SYSREG_ICC_SGI0R_EL1:
> - case HSR_SYSREG_ICC_ASGI1R_EL1:
> - /* TBD: Implement to support secure grp0/1 SGI forwarding */
> - dprintk(XENLOG_WARNING,
> - "Emulation of sysreg ICC_SGI0R_EL1/ASGI1R_EL1 not supported\n");
> - return inject_undef64_exception(regs, hsr.len);
>
> /*
> * ICC_SRE_EL2.Enable = 0
> --
> 1.9.1
>
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* Re: [PATCH 08/13] xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled.
2016-12-07 12:33 ` [PATCH 08/13] xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled Julien Grall
@ 2016-12-07 22:23 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:23 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> The vGICv3 depends whether Xen has a host driver for GICv3, not on the
> architecture (AArch64 vs AArch32).
>
> Note CONFIG_HAS_GICV3 is enabled only when for ARM64 build, so there is
> no functional change.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
> index f165178..59b3b53 100644
> --- a/xen/arch/arm/Makefile
> +++ b/xen/arch/arm/Makefile
> @@ -43,7 +43,7 @@ obj-y += time.o
> obj-y += traps.o
> obj-y += vgic.o
> obj-y += vgic-v2.o
> -obj-$(CONFIG_ARM_64) += vgic-v3.o
> +obj-$(CONFIG_HAS_GICV3) += vgic-v3.o
> obj-y += vm_event.o
> obj-y += vtimer.o
> obj-y += vpsci.o
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 10/13] xen/arm: vreg: Introduce vreg_emulate_cp{32, 64}
2016-12-07 12:33 ` [PATCH 10/13] xen/arm: vreg: Introduce vreg_emulate_cp{32, 64} Julien Grall
@ 2016-12-07 22:41 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:41 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> Factorize the code to emulate 32-bit and 64-bit access to a co-processor
> in specific helpers.
>
> The new helpers will be used in different components to simplify the
> emulation.
>
> Finally, the prototypes for the callbacks to emulate 32-bit and 64-bit
> co-processor access are the same as the sysreg one. Rather than
> introducing new ones, repurpose the existent prototypes.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/vtimer.c | 37 +++------------------------
> xen/include/asm-arm/vreg.h | 64 ++++++++++++++++++++++++++++++++++++++++++----
> 2 files changed, 62 insertions(+), 39 deletions(-)
>
> diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
> index 091b5e7..4ec3b95 100644
> --- a/xen/arch/arm/vtimer.c
> +++ b/xen/arch/arm/vtimer.c
> @@ -252,49 +252,28 @@ static bool vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r,
> static bool vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct hsr_cp32 cp32 = hsr.cp32;
> - /*
> - * Initialize to zero to avoid leaking data if there is an
> - * implementation error in the emulation (such as not correctly
> - * setting r).
> - */
> - uint32_t r = 0;
> - bool res;
> -
>
> if ( cp32.read )
> perfc_incr(vtimer_cp32_reads);
> else
> perfc_incr(vtimer_cp32_writes);
>
> - if ( !cp32.read )
> - r = get_user_reg(regs, cp32.reg);
> -
> switch ( hsr.bits & HSR_CP32_REGS_MASK )
> {
> case HSR_CPREG32(CNTP_CTL):
> - res = vtimer_cntp_ctl(regs, &r, cp32.read);
> - break;
> + return vreg_emulate_cp32(regs, hsr, vtimer_cntp_ctl);
>
> case HSR_CPREG32(CNTP_TVAL):
> - res = vtimer_cntp_tval(regs, &r, cp32.read);
> - break;
> + return vreg_emulate_cp32(regs, hsr, vtimer_cntp_tval);
>
> default:
> return false;
> }
> -
> - if ( res && cp32.read )
> - set_user_reg(regs, cp32.reg, r);
> -
> - return res;
> }
>
> static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct hsr_cp64 cp64 = hsr.cp64;
> - uint32_t r1 = get_user_reg(regs, cp64.reg1);
> - uint32_t r2 = get_user_reg(regs, cp64.reg2);
> - uint64_t x = (uint64_t)r1 | ((uint64_t)r2 << 32);
>
> if ( cp64.read )
> perfc_incr(vtimer_cp64_reads);
> @@ -304,21 +283,11 @@ static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> switch ( hsr.bits & HSR_CP64_REGS_MASK )
> {
> case HSR_CPREG64(CNTP_CVAL):
> - if ( !vtimer_cntp_cval(regs, &x, cp64.read) )
> - return false;
> - break;
> + return vreg_emulate_cp64(regs, hsr, vtimer_cntp_cval);
>
> default:
> return false;
> }
> -
> - if ( cp64.read )
> - {
> - set_user_reg(regs, cp64.reg1, x & 0xffffffff);
> - set_user_reg(regs, cp64.reg2, x >> 32);
> - }
> -
> - return true;
> }
>
> #ifdef CONFIG_ARM_64
> diff --git a/xen/include/asm-arm/vreg.h b/xen/include/asm-arm/vreg.h
> index 2671f6e..ed2bd6f 100644
> --- a/xen/include/asm-arm/vreg.h
> +++ b/xen/include/asm-arm/vreg.h
> @@ -4,14 +4,68 @@
> #ifndef __ASM_ARM_VREG__
> #define __ASM_ARM_VREG__
>
> -#ifdef CONFIG_ARM_64
> -typedef bool (*vreg_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
> +typedef bool (*vreg_reg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
> bool read);
> -typedef bool (*vreg_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
> +typedef bool (*vreg_reg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
> bool read);
>
> +static inline bool vreg_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr,
> + vreg_reg32_fn_t fn)
> +{
> + struct hsr_cp32 cp32 = hsr.cp32;
> + /*
> + * Initialize to zero to avoid leaking data if there is an
> + * implementation error in the emulation (such as not correctly
> + * setting r).
> + */
> + uint32_t r = 0;
> + bool ret;
> +
> + if ( !cp32.read )
> + r = get_user_reg(regs, cp32.reg);
> +
> + ret = fn(regs, &r, cp32.read);
> +
> + if ( ret && cp32.read )
> + set_user_reg(regs, cp32.reg, r);
> +
> + return ret;
> +}
> +
> +static inline bool vreg_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr,
> + vreg_reg64_fn_t fn)
> +{
> + struct hsr_cp64 cp64 = hsr.cp64;
> + /*
> + * Initialize to zero to avoid leaking data if there is an
> + * implementation error in the emulation (such as not correctly
> + * setting x).
> + */
> + uint64_t x = 0;
> + bool ret;
> +
> + if ( !cp64.read )
> + {
> + uint32_t r1 = get_user_reg(regs, cp64.reg1);
> + uint32_t r2 = get_user_reg(regs, cp64.reg2);
> +
> + x = (uint64_t)r1 | ((uint64_t)r2 << 32);
> + }
> +
> + ret = fn(regs, &x, cp64.read);
> +
> + if ( ret && cp64.read )
> + {
> + set_user_reg(regs, cp64.reg1, x & 0xffffffff);
> + set_user_reg(regs, cp64.reg2, x >> 32);
> + }
> +
> + return ret;
> +}
> +
> +#ifdef CONFIG_ARM_64
> static inline bool vreg_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
> - vreg_sysreg32_fn_t fn)
> + vreg_reg32_fn_t fn)
> {
> struct hsr_sysreg sysreg = hsr.sysreg;
> uint32_t r = 0;
> @@ -29,7 +83,7 @@ static inline bool vreg_emulate_sysreg32(struct cpu_user_regs *regs, union hsr h
> }
>
> static inline bool vreg_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
> - vreg_sysreg64_fn_t fn)
> + vreg_reg64_fn_t fn)
> {
> struct hsr_sysreg sysreg = hsr.sysreg;
> /*
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 09/13] xen/arm: vtimer: Move emulate_sysreg* callback in a separate header
2016-12-07 12:33 ` [PATCH 09/13] xen/arm: vtimer: Move emulate_sysreg* callback in a separate header Julien Grall
@ 2016-12-07 22:41 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:41 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> The core emulation of sysreg (reading/writing registers) is not specific
> to the virtual timer. Move the helpers in a new header vreg.h.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
>
> The helpers will be necessary in a follow-up patch to emulate sysreg
> for another components.
> ---
> xen/arch/arm/vtimer.c | 53 ++++---------------------------------------
> xen/include/asm-arm/vreg.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 60 insertions(+), 49 deletions(-)
> create mode 100644 xen/include/asm-arm/vreg.h
>
> diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
> index 3fc97b3..091b5e7 100644
> --- a/xen/arch/arm/vtimer.c
> +++ b/xen/arch/arm/vtimer.c
> @@ -27,6 +27,7 @@
> #include <asm/time.h>
> #include <asm/gic.h>
> #include <asm/vgic.h>
> +#include <asm/vreg.h>
> #include <asm/regs.h>
>
> /*
> @@ -321,52 +322,6 @@ static bool vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> }
>
> #ifdef CONFIG_ARM_64
> -typedef bool (*vtimer_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
> - bool read);
> -typedef bool (*vtimer_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
> - bool read);
> -
> -static bool vtimer_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
> - vtimer_sysreg32_fn_t fn)
> -{
> - struct hsr_sysreg sysreg = hsr.sysreg;
> - uint32_t r = 0;
> - bool ret;
> -
> - if ( !sysreg.read )
> - r = get_user_reg(regs, sysreg.reg);
> -
> - ret = fn(regs, &r, sysreg.read);
> -
> - if ( ret && sysreg.read )
> - set_user_reg(regs, sysreg.reg, r);
> -
> - return ret;
> -}
> -
> -static bool vtimer_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
> - vtimer_sysreg64_fn_t fn)
> -{
> - struct hsr_sysreg sysreg = hsr.sysreg;
> - /*
> - * Initialize to zero to avoid leaking data if there is an
> - * implementation error in the emulation (such as not correctly
> - * setting x).
> - */
> - uint64_t x = 0;
> - bool ret;
> -
> - if ( !sysreg.read )
> - x = get_user_reg(regs, sysreg.reg);
> -
> - ret = fn(regs, &x, sysreg.read);
> -
> - if ( ret && sysreg.read )
> - set_user_reg(regs, sysreg.reg, x);
> -
> - return ret;
> -}
> -
> static bool vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct hsr_sysreg sysreg = hsr.sysreg;
> @@ -379,11 +334,11 @@ static bool vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> switch ( hsr.bits & HSR_SYSREG_REGS_MASK )
> {
> case HSR_SYSREG_CNTP_CTL_EL0:
> - return vtimer_emulate_sysreg32(regs, hsr, vtimer_cntp_ctl);
> + return vreg_emulate_sysreg32(regs, hsr, vtimer_cntp_ctl);
> case HSR_SYSREG_CNTP_TVAL_EL0:
> - return vtimer_emulate_sysreg32(regs, hsr, vtimer_cntp_tval);
> + return vreg_emulate_sysreg32(regs, hsr, vtimer_cntp_tval);
> case HSR_SYSREG_CNTP_CVAL_EL0:
> - return vtimer_emulate_sysreg64(regs, hsr, vtimer_cntp_cval);
> + return vreg_emulate_sysreg64(regs, hsr, vtimer_cntp_cval);
>
> default:
> return false;
> diff --git a/xen/include/asm-arm/vreg.h b/xen/include/asm-arm/vreg.h
> new file mode 100644
> index 0000000..2671f6e
> --- /dev/null
> +++ b/xen/include/asm-arm/vreg.h
> @@ -0,0 +1,56 @@
> +/*
> + * Helpers to emulate co-processor and system registers
> + */
> +#ifndef __ASM_ARM_VREG__
> +#define __ASM_ARM_VREG__
> +
> +#ifdef CONFIG_ARM_64
> +typedef bool (*vreg_sysreg32_fn_t)(struct cpu_user_regs *regs, uint32_t *r,
> + bool read);
> +typedef bool (*vreg_sysreg64_fn_t)(struct cpu_user_regs *regs, uint64_t *r,
> + bool read);
> +
> +static inline bool vreg_emulate_sysreg32(struct cpu_user_regs *regs, union hsr hsr,
> + vreg_sysreg32_fn_t fn)
> +{
> + struct hsr_sysreg sysreg = hsr.sysreg;
> + uint32_t r = 0;
> + bool ret;
> +
> + if ( !sysreg.read )
> + r = get_user_reg(regs, sysreg.reg);
> +
> + ret = fn(regs, &r, sysreg.read);
> +
> + if ( ret && sysreg.read )
> + set_user_reg(regs, sysreg.reg, r);
> +
> + return ret;
> +}
> +
> +static inline bool vreg_emulate_sysreg64(struct cpu_user_regs *regs, union hsr hsr,
> + vreg_sysreg64_fn_t fn)
> +{
> + struct hsr_sysreg sysreg = hsr.sysreg;
> + /*
> + * Initialize to zero to avoid leaking data if there is an
> + * implementation error in the emulation (such as not correctly
> + * setting x).
> + */
> + uint64_t x = 0;
> + bool ret;
> +
> + if ( !sysreg.read )
> + x = get_user_reg(regs, sysreg.reg);
> +
> + ret = fn(regs, &x, sysreg.read);
> +
> + if ( ret && sysreg.read )
> + set_user_reg(regs, sysreg.reg, x);
> +
> + return ret;
> +}
> +
> +#endif
> +
> +#endif /* __ASM_ARM_VREG__ */
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg
2016-12-07 12:33 ` [PATCH 11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg Julien Grall
@ 2016-12-07 22:44 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:44 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> We will want to emulate co-processor registers access in a follow-up
> patch.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/vgic-v3.c | 13 ++++++++++++-
> xen/arch/arm/vgic.c | 4 ++--
> xen/include/asm-arm/vgic.h | 4 ++--
> 3 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index e54df0b..f3f0bd2 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -1328,6 +1328,17 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> }
> }
>
> +static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr)
> +{
> + switch (hsr.ec)
> + {
> + case HSR_EC_SYSREG:
> + return vgic_v3_emulate_sysreg(regs, hsr);
> + default:
> + return false;
> + }
> +}
> +
> static const struct mmio_handler_ops vgic_rdistr_mmio_handler = {
> .read = vgic_v3_rdistr_mmio_read,
> .write = vgic_v3_rdistr_mmio_write,
> @@ -1491,7 +1502,7 @@ static const struct vgic_ops v3_ops = {
> .vcpu_init = vgic_v3_vcpu_init,
> .domain_init = vgic_v3_domain_init,
> .domain_free = vgic_v3_domain_free,
> - .emulate_sysreg = vgic_v3_emulate_sysreg,
> + .emulate_reg = vgic_v3_emulate_reg,
> /*
> * We use both AFF1 and AFF0 in (v)MPIDR. Thus, the max number of CPU
> * that can be supported is up to 4096(==256*16) in theory.
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 196e86b..364d5f0 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -550,9 +550,9 @@ bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
> {
> struct vcpu *v = current;
>
> - ASSERT(v->domain->arch.vgic.handler->emulate_sysreg != NULL);
> + ASSERT(v->domain->arch.vgic.handler->emulate_reg != NULL);
>
> - return v->domain->arch.vgic.handler->emulate_sysreg(regs, hsr);
> + return v->domain->arch.vgic.handler->emulate_reg(regs, hsr);
> }
>
> bool vgic_reserve_virq(struct domain *d, unsigned int virq)
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index fadb1e1..672f649 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -130,8 +130,8 @@ struct vgic_ops {
> int (*domain_init)(struct domain *d);
> /* Release resources that were allocated by domain_init */
> void (*domain_free)(struct domain *d);
> - /* vGIC sysreg emulation */
> - bool (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
> + /* vGIC sysreg/cpregs emulate */
> + bool (*emulate_reg)(struct cpu_user_regs *regs, union hsr hsr);
> /* Maximum number of vCPU supported */
> const unsigned int max_vcpus;
> };
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 12/13] xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate helper
2016-12-07 12:33 ` [PATCH 12/13] xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate helper Julien Grall
@ 2016-12-07 22:47 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:47 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> The emulation of the co-processor register ICC_SGI1R is the same as the
> system register ICC_SGI1R_EL1. So move the emulation outside and use the
> newly introduced helper vreg_emulate_sysreg64 to abstract the access.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/vgic-v3.c | 25 ++++++++++++++++---------
> 1 file changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index f3f0bd2..f23135d 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -31,6 +31,7 @@
> #include <asm/gic_v3_defs.h>
> #include <asm/vgic.h>
> #include <asm/vgic-emul.h>
> +#include <asm/vreg.h>
>
> /*
> * PIDR2: Only bits[7:4] are not implementation defined. We are
> @@ -1300,9 +1301,21 @@ static bool vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
> return vgic_to_sgi(v, sgir, sgi_mode, virq, &target);
> }
>
> +static bool vgic_v3_emulate_sgi1r(struct cpu_user_regs *regs, uint64_t *r,
> + bool read)
> +{
> + /* WO */
> + if ( !read )
> + return vgic_v3_to_sgi(current, *r);
> + else
> + {
> + gdprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
> + return false;
> + }
> +}
> +
> static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> {
> - struct vcpu *v = current;
> struct hsr_sysreg sysreg = hsr.sysreg;
>
> ASSERT (hsr.ec == HSR_EC_SYSREG);
> @@ -1315,14 +1328,8 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> switch ( hsr.bits & HSR_SYSREG_REGS_MASK )
> {
> case HSR_SYSREG_ICC_SGI1R_EL1:
> - /* WO */
> - if ( !sysreg.read )
> - return vgic_v3_to_sgi(v, get_user_reg(regs, sysreg.reg));
> - else
> - {
> - gprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
> - return false;
> - }
> + return vreg_emulate_sysreg64(regs, hsr, vgic_v3_emulate_sgi1r);
> +
> default:
> return false;
> }
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 13/13] xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3
2016-12-07 12:33 ` [PATCH 13/13] xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3 Julien Grall
@ 2016-12-07 22:50 ` Stefano Stabellini
0 siblings, 0 replies; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:50 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> AArch32 guest will use co-processor registers to access the GICv3 (see
> 8.5 in IHI 0069C). Some of the registers have to be trapped and emulated
> (e.g ICC_SGI1R), this is the purpose of this patch.
>
> The rest of the emulation already supports access required for AArch32
> so nothing has to be changed there.
>
> Note this is only enabling 32-bit guest using GICv3 on Xen ARM64. Further
> work would be required to compile GICv3 and vGICv3 for Xen ARM32.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/arm/traps.c | 12 ++++++++++++
> xen/arch/arm/vgic-v3.c | 20 ++++++++++++++++++++
> xen/include/asm-arm/cpregs.h | 3 +++
> xen/include/asm-arm/perfc_defn.h | 2 ++
> 4 files changed, 37 insertions(+)
>
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index 1fe02cb..eb85d92 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -1876,6 +1876,18 @@ static void do_cp15_64(struct cpu_user_regs *regs,
> break;
>
> /*
> + * HCR_EL2.FMO or HCR_EL2.IMO
> + *
> + * GIC Architecture Specification (IHI 0069C): Section 4.6.3
> + */
> + case HSR_CPREG64(ICC_SGI1R):
> + case HSR_CPREG64(ICC_ASGI1R):
> + case HSR_CPREG64(ICC_SGI0R):
> + if ( !vgic_emulate(regs, hsr) )
> + return inject_undef_exception(regs, hsr);
> + break;
> +
> + /*
> * CPTR_EL2.T{0..9,12..13}
> *
> * ARMv7 (DDI 0406C.b): B1.14.12
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index f23135d..22c8ce0 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -1335,12 +1335,32 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
> }
> }
>
> +static bool vgic_v3_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
> +{
> + struct hsr_cp64 cp64 = hsr.cp64;
> +
> + if ( cp64.read )
> + perfc_incr(vgic_cp64_reads);
> + else
> + perfc_incr(vgic_cp64_writes);
> +
> + switch ( hsr.bits & HSR_CP64_REGS_MASK )
> + {
> + case HSR_CPREG64(ICC_SGI1R):
> + return vreg_emulate_cp64(regs, hsr, vgic_v3_emulate_sgi1r);
> + default:
> + return false;
> + }
> +}
> +
> static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr)
> {
> switch (hsr.ec)
> {
> case HSR_EC_SYSREG:
> return vgic_v3_emulate_sysreg(regs, hsr);
> + case HSR_EC_CP15_64:
> + return vgic_v3_emulate_cp64(regs, hsr);
> default:
> return false;
> }
> diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h
> index e5cb00c..af45ec7 100644
> --- a/xen/include/asm-arm/cpregs.h
> +++ b/xen/include/asm-arm/cpregs.h
> @@ -246,6 +246,9 @@
> /* CP15 CR11: DMA Operations for TCM Access */
>
> /* CP15 CR12: */
> +#define ICC_SGI1R p15,0,c12 /* Interrupt Controller SGI Group 1 */
> +#define ICC_ASGI1R p15,1,c12 /* Interrupt Controller Alias SGI Group 1 Register */
> +#define ICC_SGI0R p15,2,c12 /* Interrupt Controller SGI Group 0 */
> #define VBAR p15,0,c12,c0,0 /* Vector Base Address Register */
> #define HVBAR p15,4,c12,c0,0 /* Hyp. Vector Base Address Register */
>
> diff --git a/xen/include/asm-arm/perfc_defn.h b/xen/include/asm-arm/perfc_defn.h
> index 69fabe7..5f957ee 100644
> --- a/xen/include/asm-arm/perfc_defn.h
> +++ b/xen/include/asm-arm/perfc_defn.h
> @@ -38,6 +38,8 @@ PERFCOUNTER(vgicd_reads, "vgicd: read")
> PERFCOUNTER(vgicd_writes, "vgicd: write")
> PERFCOUNTER(vgicr_reads, "vgicr: read")
> PERFCOUNTER(vgicr_writes, "vgicr: write")
> +PERFCOUNTER(vgic_cp64_reads, "vgic: cp64 read")
> +PERFCOUNTER(vgic_cp64_writes, "vgic: cp64 write")
> PERFCOUNTER(vgic_sysreg_reads, "vgic: sysreg read")
> PERFCOUNTER(vgic_sysreg_writes, "vgic: sysreg write")
> PERFCOUNTER(vgic_sgi_list , "vgic: SGI send to list")
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
` (12 preceding siblings ...)
2016-12-07 12:33 ` [PATCH 13/13] xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3 Julien Grall
@ 2016-12-07 22:51 ` Stefano Stabellini
2016-12-08 11:11 ` Julien Grall
13 siblings, 1 reply; 30+ messages in thread
From: Stefano Stabellini @ 2016-12-07 22:51 UTC (permalink / raw)
To: Julien Grall; +Cc: sstabellini, xen-devel
On Wed, 7 Dec 2016, Julien Grall wrote:
> Hi all,
>
> Currently, it is only possible to start AArch32 guest with GICv2. This means
> that if the host interrupt controller is not compatible with GICv2, it will
> not be possible to boot AArch32 guest.
>
> The vGICv3 code is nearly fully compatible with AArch32 guest except that
> co-processor access to ICC_SGI1R_EL1 is not emulated.
>
> The first part (#1 - #11) of the series contains clean-up, only patch #12 and
> #13 contains the meat.
>
> Note this is only allowing AArch32 guest to use GICv3 on AArch64 host. This
> series does not add support for GICv3 on AArch32 host.
>
> A branch with all the patches can be found on xenbits:
>
> git://xenbits.xen.org/people/julieng/xen-unstable.git branch gicv3-32bit-v1
Nice and clean series. Only a couple of minor issues, I fixed them as I
applied the patches.
Thanks,
Stefano
> Regards,
>
> Julien Grall (13):
> xen/arm: vtimer: Switch the emulation functions return from int to
> bool
> xen/arm: vtimer: Switch the read variable in the emulation from int to
> bool
> xen/arm: traps: Switch from bool_t to bool
> xen/arm: vgic: Switch from bool_t to bool
> xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate
> up to...
> xen/arm: vgic: Switch emulate_sysreg return from int to bool
> xen/arm: vgic: Clean-up the sysreg emulation
> xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled.
> xen/arm: vtimer: Move emulate_sysreg* callback in a separate header
> xen/arm: vreg: Introduce vreg_emulate_cp{32,64}
> xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg
> xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate
> helper
> xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3
>
> xen/arch/arm/Makefile | 2 +-
> xen/arch/arm/traps.c | 42 +++++++------
> xen/arch/arm/vgic-v2.c | 4 +-
> xen/arch/arm/vgic-v3.c | 64 ++++++++++++++++----
> xen/arch/arm/vgic.c | 22 +++----
> xen/arch/arm/vtimer.c | 126 ++++++++-------------------------------
> xen/arch/arm/vtimer.h | 2 +-
> xen/include/asm-arm/cpregs.h | 3 +
> xen/include/asm-arm/perfc_defn.h | 2 +
> xen/include/asm-arm/vgic.h | 20 +++----
> xen/include/asm-arm/vreg.h | 110 ++++++++++++++++++++++++++++++++++
> 11 files changed, 240 insertions(+), 157 deletions(-)
> create mode 100644 xen/include/asm-arm/vreg.h
>
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3
2016-12-07 22:51 ` [PATCH 00/13] xen/arm: Allow AArch32 guest to boot " Stefano Stabellini
@ 2016-12-08 11:11 ` Julien Grall
0 siblings, 0 replies; 30+ messages in thread
From: Julien Grall @ 2016-12-08 11:11 UTC (permalink / raw)
To: Stefano Stabellini; +Cc: xen-devel
Hi Stefano,
On 07/12/16 22:51, Stefano Stabellini wrote:
> On Wed, 7 Dec 2016, Julien Grall wrote:
>> Hi all,
>>
>> Currently, it is only possible to start AArch32 guest with GICv2. This means
>> that if the host interrupt controller is not compatible with GICv2, it will
>> not be possible to boot AArch32 guest.
>>
>> The vGICv3 code is nearly fully compatible with AArch32 guest except that
>> co-processor access to ICC_SGI1R_EL1 is not emulated.
>>
>> The first part (#1 - #11) of the series contains clean-up, only patch #12 and
>> #13 contains the meat.
>>
>> Note this is only allowing AArch32 guest to use GICv3 on AArch64 host. This
>> series does not add support for GICv3 on AArch32 host.
>>
>> A branch with all the patches can be found on xenbits:
>>
>> git://xenbits.xen.org/people/julieng/xen-unstable.git branch gicv3-32bit-v1
>
> Nice and clean series. Only a couple of minor issues, I fixed them as I
> applied the patches.
Thank you! Good catch for the missing 0 to false change.
Cheers,
--
Julien Grall
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^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2016-12-08 11:11 UTC | newest]
Thread overview: 30+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-12-07 12:33 [PATCH 00/13] xen/arm: Allow AArch32 guest to boot with GICv3 Julien Grall
2016-12-07 12:33 ` [PATCH 01/13] xen/arm: vtimer: Switch the emulation functions return from int to bool Julien Grall
2016-12-07 21:44 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 02/13] xen/arm: vtimer: Switch the read variable in the emulation " Julien Grall
2016-12-07 21:49 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 03/13] xen/arm: traps: Switch from bool_t " Julien Grall
2016-12-07 21:51 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 04/13] xen/arm: vgic: " Julien Grall
2016-12-07 21:53 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 05/13] xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to Julien Grall
2016-12-07 21:55 ` Stefano Stabellini
2016-12-07 22:02 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 06/13] xen/arm: vgic: Switch emulate_sysreg return from int to bool Julien Grall
2016-12-07 22:02 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 07/13] xen/arm: vgic: Clean-up the sysreg emulation Julien Grall
2016-12-07 22:08 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 08/13] xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled Julien Grall
2016-12-07 22:23 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 09/13] xen/arm: vtimer: Move emulate_sysreg* callback in a separate header Julien Grall
2016-12-07 22:41 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 10/13] xen/arm: vreg: Introduce vreg_emulate_cp{32, 64} Julien Grall
2016-12-07 22:41 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg Julien Grall
2016-12-07 22:44 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 12/13] xen/arm: vgic-v3: Move the emulation of ICC_SGI1R_EL1 in a separate helper Julien Grall
2016-12-07 22:47 ` Stefano Stabellini
2016-12-07 12:33 ` [PATCH 13/13] xen/arm: vgic-v3: Allow AArch32 guest booting with GICv3 Julien Grall
2016-12-07 22:50 ` Stefano Stabellini
2016-12-07 22:51 ` [PATCH 00/13] xen/arm: Allow AArch32 guest to boot " Stefano Stabellini
2016-12-08 11:11 ` Julien Grall
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