From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: wei.liu2@citrix.com, andrew.cooper3@citrix.com,
dario.faggioli@citrix.com, he.chen@linux.intel.com,
ian.jackson@eu.citrix.com, Yi Sun <yi.y.sun@linux.intel.com>,
mengxu@cis.upenn.edu, jbeulich@suse.com,
chao.p.peng@linux.intel.com
Subject: [PATCH v4 13/24] x86: refactor psr: implement CPU init and free flow for CDP.
Date: Wed, 14 Dec 2016 12:07:53 +0800 [thread overview]
Message-ID: <1481688484-5093-14-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1481688484-5093-1-git-send-email-yi.y.sun@linux.intel.com>
This patch implements the CPU init and free flow for CDP including L3 CDP
initialization callback function.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
---
xen/arch/x86/psr.c | 101 +++++++++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 98 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index ec757a2..09da12c 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -91,6 +91,7 @@ struct psr_cat_hw_info {
struct feat_hw_info {
union {
struct psr_cat_hw_info l3_cat_info;
+ struct psr_cat_hw_info l3_cdp_info;
};
};
@@ -213,6 +214,22 @@ struct feat_node {
struct list_head list;
};
+/*
+ * get_data - get DATA COS register value from input COS ID.
+ * @feat: the feature list entry.
+ * @cos: the COS ID.
+ */
+#define get_cdp_data(feat, cos) \
+ ( feat->cos_reg_val[cos * 2] )
+
+/*
+ * get_cdp_code - get CODE COS register value from input COS ID.
+ * @feat: the feature list entry.
+ * @cos: the COS ID.
+ */
+#define get_cdp_code(feat, cos) \
+ ( feat->cos_reg_val[cos * 2 + 1] )
+
struct psr_assoc {
uint64_t val;
uint64_t cos_mask;
@@ -230,6 +247,7 @@ static DEFINE_PER_CPU(struct psr_assoc, psr_assoc);
/* Declare feature list entry. */
static struct feat_node *feat_l3_cat;
+static struct feat_node *feat_l3_cdp;
/* Common functions. */
static void free_feature(struct psr_socket_info *info)
@@ -252,6 +270,12 @@ static void free_feature(struct psr_socket_info *info)
xfree(feat_l3_cat);
feat_l3_cat = NULL;
}
+
+ if ( feat_l3_cdp )
+ {
+ xfree(feat_l3_cdp);
+ feat_l3_cdp = NULL;
+ }
}
static bool_t psr_check_cbm(unsigned int cbm_len, uint64_t cbm)
@@ -474,6 +498,61 @@ struct feat_ops l3_cat_ops = {
.write_msr = l3_cat_write_msr,
};
+/* L3 CDP callback functions implementation. */
+static void l3_cdp_init_feature(unsigned int eax, unsigned int ebx,
+ unsigned int ecx, unsigned int edx,
+ struct feat_node *feat,
+ struct psr_socket_info *info)
+{
+ struct psr_cat_hw_info l3_cdp;
+ unsigned int socket;
+ uint64_t val;
+
+ /* No valid value so do not enable feature. */
+ if ( !eax || !edx )
+ return;
+
+ l3_cdp.cbm_len = (eax & CAT_CBM_LEN_MASK) + 1;
+ /* Cut half of cos_max when CDP is enabled. */
+ l3_cdp.cos_max = min(opt_cos_max, edx & CAT_COS_MAX_MASK) >> 1;
+
+ /* cos=0 is reserved as default cbm(all ones). */
+ get_cdp_code(feat, 0) =
+ (1ull << l3_cdp.cbm_len) - 1;
+ get_cdp_data(feat, 0) =
+ (1ull << l3_cdp.cbm_len) - 1;
+
+ /* We only write mask1 since mask0 is always all ones by default. */
+ wrmsrl(MSR_IA32_PSR_L3_MASK(1), (1ull << l3_cdp.cbm_len) - 1);
+ rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val);
+ wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, val | (1 << PSR_L3_QOS_CDP_ENABLE_BIT));
+
+ feat->feature = PSR_SOCKET_L3_CDP;
+ __set_bit(PSR_SOCKET_L3_CDP, &info->feat_mask);
+
+ feat->info.l3_cdp_info = l3_cdp;
+
+ info->nr_feat++;
+
+ /* Add this feature into list. */
+ list_add_tail(&feat->list, &info->feat_list);
+
+ socket = cpu_to_socket(smp_processor_id());
+ printk(XENLOG_INFO "L3 CDP: enabled on socket %u, cos_max:%u, cbm_len:%u\n",
+ socket, feat->info.l3_cdp_info.cos_max,
+ feat->info.l3_cdp_info.cbm_len);
+}
+
+static unsigned int l3_cdp_get_max_cos_max(const struct feat_node *feat)
+{
+ return feat->info.l3_cdp_info.cos_max;
+}
+
+struct feat_ops l3_cdp_ops = {
+ .init_feature = l3_cdp_init_feature,
+ .get_max_cos_max = l3_cdp_get_max_cos_max,
+};
+
static void __init parse_psr_bool(char *s, char *value, char *feature,
unsigned int mask)
{
@@ -1159,6 +1238,14 @@ static int cpu_prepare_work(unsigned int cpu)
(feat_l3_cat = xzalloc(struct feat_node)) == NULL )
return -ENOMEM;
+ if ( feat_l3_cdp == NULL &&
+ (feat_l3_cdp = xzalloc(struct feat_node)) == NULL )
+ {
+ xfree(feat_l3_cat);
+ feat_l3_cat = NULL;
+ return -ENOMEM;
+ }
+
return 0;
}
@@ -1186,9 +1273,17 @@ static void cpu_init_work(void)
{
cpuid_count(PSR_CPUID_LEVEL_CAT, 1, &eax, &ebx, &ecx, &edx);
- feat_tmp = feat_l3_cat;
- feat_l3_cat = NULL;
- feat_tmp->ops = l3_cat_ops;
+ if ( (ecx & PSR_CAT_CDP_CAPABILITY) && (opt_psr & PSR_CDP) &&
+ !test_bit(PSR_SOCKET_L3_CDP, &info->feat_mask) )
+ {
+ feat_tmp = feat_l3_cdp;
+ feat_l3_cdp = NULL;
+ feat_tmp->ops = l3_cdp_ops;
+ } else {
+ feat_tmp = feat_l3_cat;
+ feat_l3_cat = NULL;
+ feat_tmp->ops = l3_cat_ops;
+ }
feat_tmp->ops.init_feature(eax, ebx, ecx, edx, feat_tmp, info);
}
--
1.9.1
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next prev parent reply other threads:[~2016-12-14 11:10 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-14 4:07 [PATCH v4 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2016-12-14 4:07 ` [PATCH v4 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2016-12-14 4:07 ` [PATCH v4 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2016-12-22 16:03 ` Jan Beulich
2016-12-26 2:28 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 03/24] x86: refactor psr: implement main data structures Yi Sun
2016-12-22 16:13 ` Jan Beulich
2016-12-26 6:56 ` Yi Sun
2017-01-03 8:00 ` Jan Beulich
2017-01-03 8:49 ` Yi Sun
2017-01-03 9:12 ` Jan Beulich
2017-01-03 10:28 ` Yi Sun
2017-01-03 11:23 ` Jan Beulich
2016-12-14 4:07 ` [PATCH v4 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-10 11:45 ` Jan Beulich
2017-01-11 3:14 ` Yi Sun
2017-01-11 13:48 ` Jan Beulich
2017-01-12 1:07 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-10 13:34 ` Jan Beulich
2017-01-11 3:17 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-10 13:46 ` Jan Beulich
2017-01-11 5:13 ` Yi Sun
2017-01-11 13:53 ` Jan Beulich
2017-01-12 1:08 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-10 13:50 ` Jan Beulich
2017-01-11 5:16 ` Yi Sun
2017-01-11 13:54 ` Jan Beulich
2017-01-12 1:09 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-10 14:17 ` Jan Beulich
2017-01-11 5:57 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-10 14:34 ` Jan Beulich
2017-01-11 6:07 ` Yi Sun
2017-01-11 13:57 ` Jan Beulich
2017-01-12 1:17 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-10 14:53 ` Jan Beulich
2017-01-11 6:10 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 11/24] x86: refactor psr: set value: implement cos id allocation flow Yi Sun
2017-01-10 15:08 ` Jan Beulich
2017-01-11 6:16 ` Yi Sun
2016-12-14 4:07 ` [PATCH v4 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-10 15:15 ` Jan Beulich
2017-01-11 6:22 ` Yi Sun
2017-01-11 14:01 ` Jan Beulich
2017-01-12 1:22 ` Yi Sun
2017-01-12 9:40 ` Jan Beulich
2017-01-12 10:22 ` Yi Sun
2016-12-14 4:07 ` Yi Sun [this message]
2016-12-14 4:07 ` [PATCH v4 14/24] x86: refactor psr: implement get hw info flow for CDP Yi Sun
2016-12-14 4:07 ` [PATCH v4 15/24] x86: refactor psr: implement get value " Yi Sun
2016-12-14 4:07 ` [PATCH v4 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2016-12-14 4:07 ` [PATCH v4 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2016-12-14 4:07 ` [PATCH v4 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2016-12-14 4:07 ` [PATCH v4 19/24] x86: L2 CAT: implement get value flow Yi Sun
2016-12-14 4:08 ` [PATCH v4 20/24] x86: L2 CAT: implement set " Yi Sun
2016-12-14 4:08 ` [PATCH v4 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-06 12:04 ` Wei Liu
2017-01-09 1:19 ` Yi Sun
2017-01-09 8:31 ` Jan Beulich
2017-01-09 9:26 ` Wei Liu
2017-01-10 8:00 ` Yi Sun
2017-01-10 8:46 ` Jan Beulich
2017-01-10 9:01 ` Yi Sun
2016-12-14 4:08 ` [PATCH v4 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-06 12:04 ` Wei Liu
2017-01-09 1:24 ` Yi Sun
2017-01-09 10:08 ` Wei Liu
2017-01-10 7:47 ` Yi Sun
2016-12-14 4:08 ` [PATCH v4 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-06 12:04 ` Wei Liu
2017-01-09 1:14 ` Yi Sun
2016-12-14 4:08 ` [PATCH v4 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-06 12:04 ` Wei Liu
2017-01-09 1:25 ` Yi Sun
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