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From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: wei.liu2@citrix.com, konrad.wilk@oracle.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	he.chen@linux.intel.com, ian.jackson@eu.citrix.com,
	Yi Sun <yi.y.sun@linux.intel.com>,
	mengxu@cis.upenn.edu, jbeulich@suse.com,
	chao.p.peng@linux.intel.com
Subject: [PATCH RESEND v5 14/24] x86: refactor psr: implement get hw info flow for CDP.
Date: Thu, 19 Jan 2017 14:01:16 +0800	[thread overview]
Message-ID: <1484805686-7249-15-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1484805686-7249-1-git-send-email-yi.y.sun@linux.intel.com>

This patch implements get HW info flow for CDP including L3 CDP callback
function.

It also changes sysctl function to make it work for CDP.

With this patch, 'psr-hwinfo' can work for L3 CDP.

Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
---
v5:
    - rename 'dat[]' to 'data[]'
    - remove type check in callback function.
---
 xen/arch/x86/psr.c    | 18 ++++++++++++++++++
 xen/arch/x86/sysctl.c | 24 +++++++++++++++++++++---
 2 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index a979128..b856761 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -262,6 +262,10 @@ static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
     case PSR_CBM_TYPE_L3:
         feat_type = PSR_SOCKET_L3_CAT;
         break;
+    case PSR_CBM_TYPE_L3_DATA:
+    case PSR_CBM_TYPE_L3_CODE:
+        feat_type = PSR_SOCKET_L3_CDP;
+        break;
     default:
         feat_type = 0xFFFF;
         break;
@@ -516,8 +520,22 @@ static unsigned int l3_cdp_get_cos_max(const struct feat_node *feat)
     return feat->info.l3_cdp_info.cos_max;
 }
 
+static bool l3_cdp_get_feat_info(const struct feat_node *feat,
+                                 uint32_t data[], uint32_t array_len)
+{
+    if ( !data || 3 > array_len )
+        return false;
+
+    data[CBM_LEN] = feat->info.l3_cdp_info.cbm_len;
+    data[COS_MAX] = feat->info.l3_cdp_info.cos_max;
+    data[PSR_FLAG] |= XEN_SYSCTL_PSR_CAT_L3_CDP;
+
+    return true;
+}
+
 struct feat_ops l3_cdp_ops = {
     .get_cos_max = l3_cdp_get_cos_max,
+    .get_feat_info = l3_cdp_get_feat_info,
 };
 
 static void __init parse_psr_bool(char *s, char *value, char *feature,
diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
index d90db78..a4c8cfe 100644
--- a/xen/arch/x86/sysctl.c
+++ b/xen/arch/x86/sysctl.c
@@ -181,9 +181,27 @@ long arch_do_sysctl(
             ret = psr_get_info(sysctl->u.psr_cat_op.target,
                                PSR_CBM_TYPE_L3, data, 3);
 
-            sysctl->u.psr_cat_op.u.l3_info.cbm_len = data[CBM_LEN];
-            sysctl->u.psr_cat_op.u.l3_info.cos_max = data[COS_MAX];
-            sysctl->u.psr_cat_op.u.l3_info.flags   = data[PSR_FLAG];
+            if ( !ret )
+            {
+                sysctl->u.psr_cat_op.u.l3_info.cbm_len = data[CBM_LEN];
+                sysctl->u.psr_cat_op.u.l3_info.cos_max = data[COS_MAX];
+                sysctl->u.psr_cat_op.u.l3_info.flags   = data[PSR_FLAG];
+            } else {
+                /*
+                 * Check if CDP is enabled.
+                 *
+                 * Per spec, L3 CAT and CDP cannot co-exist. So, we need replace
+                 * output values to CDP's if it is enabled.
+                 */
+                ret = psr_get_info(sysctl->u.psr_cat_op.target,
+                               PSR_CBM_TYPE_L3_CODE, data, 3);
+                if ( !ret )
+                {
+                    sysctl->u.psr_cat_op.u.l3_info.cbm_len = data[CBM_LEN];
+                    sysctl->u.psr_cat_op.u.l3_info.cos_max = data[COS_MAX];
+                    sysctl->u.psr_cat_op.u.l3_info.flags   = data[PSR_FLAG];
+                }
+            }
 
             if ( !ret && __copy_field_to_guest(u_sysctl, sysctl, u.psr_cat_op) )
                 ret = -EFAULT;
-- 
1.9.1


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  parent reply	other threads:[~2017-01-19  6:03 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-19  6:01 [PATCH RESEND v5 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2017-01-20  9:39   ` Tian, Kevin
2017-01-22  2:15     ` Yi Sun
2017-02-08  6:45       ` Tian, Kevin
2017-01-30 18:10   ` Konrad Rzeszutek Wilk
2017-01-30 20:39     ` Konrad Rzeszutek Wilk
2017-02-04  7:24       ` Yi Sun
2017-02-04  7:06     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-01-30 22:05   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-01-30 22:20   ` Konrad Rzeszutek Wilk
2017-01-31 10:10     ` Jan Beulich
2017-01-31 14:12       ` Konrad Rzeszutek Wilk
2017-01-31 15:07         ` Jan Beulich
2017-01-31 17:32           ` Konrad Rzeszutek Wilk
2017-02-05  1:53     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-31  2:44   ` Konrad Rzeszutek Wilk
2017-01-31 10:14     ` Jan Beulich
2017-01-31 14:13       ` Konrad Rzeszutek Wilk
2017-01-31 10:53     ` Andrew Cooper
2017-01-19  6:01 ` [PATCH RESEND v5 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-31 19:52   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-31 20:17   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-31 20:29   ` Konrad Rzeszutek Wilk
2017-02-07  2:47     ` Yi Sun
2017-02-07 13:56       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-31 20:57   ` Konrad Rzeszutek Wilk
2017-02-07  2:51     ` Yi Sun
2017-02-07 13:57       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-01-19  6:01 ` Yi Sun [this message]
2017-01-19  6:01 ` [PATCH RESEND v5 15/24] x86: refactor psr: implement get value " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 20/24] x86: L2 CAT: implement set " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-27 15:18   ` Wei Liu

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