From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: wei.liu2@citrix.com, konrad.wilk@oracle.com,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
he.chen@linux.intel.com, ian.jackson@eu.citrix.com,
Yi Sun <yi.y.sun@linux.intel.com>,
mengxu@cis.upenn.edu, jbeulich@suse.com,
chao.p.peng@linux.intel.com
Subject: [PATCH RESEND v5 17/24] x86: L2 CAT: implement CPU init and free flow.
Date: Thu, 19 Jan 2017 14:01:19 +0800 [thread overview]
Message-ID: <1484805686-7249-18-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1484805686-7249-1-git-send-email-yi.y.sun@linux.intel.com>
This patch implements the CPU init and free flow for L2 CAT including
L2 CAT initialization callback function.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
---
v5:
- remove 'feat_l2_cat' free in 'free_feature'.
- Encapsulate cpuid registers into 'struct cpuid_leaf_regs'.
- Print socket info when 'opt_cpu_info' is true.
- rename 'l2_cat_get_max_cos_max' to 'l2_cat_get_cos_max'.
- rename 'dat[]' to 'data[]'
- move 'cpu_prepare_work' contents into 'psr_cpu_prepare'.
---
xen/arch/x86/psr.c | 72 +++++++++++++++++++++++++++++++++++++++++++++++
xen/include/asm-x86/psr.h | 1 +
2 files changed, 73 insertions(+)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 596e5b1..5320ae6 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -94,6 +94,7 @@ struct feat_hw_info {
union {
struct psr_cat_hw_info l3_cat_info;
struct psr_cat_hw_info l3_cdp_info;
+ struct psr_cat_hw_info l2_cat_info;
};
};
@@ -236,6 +237,7 @@ static DEFINE_PER_CPU(struct psr_assoc, psr_assoc);
*/
static struct feat_node *feat_l3_cat;
static struct feat_node *feat_l3_cdp;
+static struct feat_node *feat_l2_cat;
/* Common functions. */
static void free_feature(struct psr_socket_info *info)
@@ -672,6 +674,51 @@ struct feat_ops l3_cdp_ops = {
.write_msr = l3_cdp_write_msr,
};
+/* L2 CAT callback functions implementation. */
+static void l2_cat_init_feature(struct cpuid_leaf_regs regs,
+ struct feat_node *feat,
+ struct psr_socket_info *info)
+{
+ struct psr_cat_hw_info l2_cat;
+ unsigned int socket;
+
+ /* No valid values so do not enable the feature. */
+ if ( !regs.eax || !regs.edx )
+ return;
+
+ l2_cat.cbm_len = (regs.eax & CAT_CBM_LEN_MASK) + 1;
+ l2_cat.cos_max = min(opt_cos_max, regs.edx & CAT_COS_MAX_MASK);
+
+ /* cos=0 is reserved as default cbm(all ones). */
+ feat->cos_reg_val[0] = (1ull << l2_cat.cbm_len) - 1;
+
+ feat->feature = PSR_SOCKET_L2_CAT;
+ __set_bit(PSR_SOCKET_L2_CAT, &info->feat_mask);
+
+ feat->info.l2_cat_info = l2_cat;
+
+ info->nr_feat++;
+
+ /* Add this feature into list. */
+ list_add_tail(&feat->list, &info->feat_list);
+
+ socket = cpu_to_socket(smp_processor_id());
+ if ( opt_cpu_info )
+ printk(XENLOG_INFO
+ "L2 CAT: enabled on socket %u, cos_max:%u, cbm_len:%u.\n",
+ socket, feat->info.l2_cat_info.cos_max,
+ feat->info.l2_cat_info.cbm_len);
+}
+
+static unsigned int l2_cat_get_cos_max(const struct feat_node *feat)
+{
+ return feat->info.l2_cat_info.cos_max;
+}
+
+struct feat_ops l2_cat_ops = {
+ .get_cos_max = l2_cat_get_cos_max,
+};
+
static void __init parse_psr_bool(char *s, char *value, char *feature,
unsigned int mask)
{
@@ -1445,6 +1492,20 @@ static void cpu_init_work(void)
l3_cat_init_feature(regs, feat, info);
}
}
+
+ cpuid_count(PSR_CPUID_LEVEL_CAT, 0,
+ ®s.eax, ®s.ebx, ®s.ecx, ®s.edx);
+ if ( regs.ebx & PSR_RESOURCE_TYPE_L2 )
+ {
+ /* Initialize L2 CAT according to CPUID. */
+ cpuid_count(PSR_CPUID_LEVEL_CAT, 2,
+ ®s.eax, ®s.ebx, ®s.ecx, ®s.edx);
+
+ feat = feat_l2_cat;
+ feat_l2_cat = NULL;
+ feat->ops = l2_cat_ops;
+ l2_cat_init_feature(regs, feat, info);
+ }
}
static void cpu_fini_work(unsigned int cpu)
@@ -1503,6 +1564,17 @@ static int psr_cpu_prepare(unsigned int cpu)
return -ENOMEM;
}
+ if ( feat_l2_cat == NULL &&
+ (feat_l2_cat = xzalloc(struct feat_node)) == NULL )
+ {
+ xfree(feat_l3_cat);
+ feat_l3_cat = NULL;
+
+ xfree(feat_l3_cdp);
+ feat_l3_cdp = NULL;
+ return -ENOMEM;
+ }
+
return 0;
}
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index 97214fe..d2c7a13 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -23,6 +23,7 @@
/* Resource Type Enumeration */
#define PSR_RESOURCE_TYPE_L3 0x2
+#define PSR_RESOURCE_TYPE_L2 0x4
/* L3 Monitoring Features */
#define PSR_CMT_L3_OCCUPANCY 0x1
--
1.9.1
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next prev parent reply other threads:[~2017-01-19 6:03 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-19 6:01 [PATCH RESEND v5 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2017-01-20 9:39 ` Tian, Kevin
2017-01-22 2:15 ` Yi Sun
2017-02-08 6:45 ` Tian, Kevin
2017-01-30 18:10 ` Konrad Rzeszutek Wilk
2017-01-30 20:39 ` Konrad Rzeszutek Wilk
2017-02-04 7:24 ` Yi Sun
2017-02-04 7:06 ` Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-01-30 22:05 ` Konrad Rzeszutek Wilk
2017-01-19 6:01 ` [PATCH RESEND v5 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-01-30 22:20 ` Konrad Rzeszutek Wilk
2017-01-31 10:10 ` Jan Beulich
2017-01-31 14:12 ` Konrad Rzeszutek Wilk
2017-01-31 15:07 ` Jan Beulich
2017-01-31 17:32 ` Konrad Rzeszutek Wilk
2017-02-05 1:53 ` Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-31 2:44 ` Konrad Rzeszutek Wilk
2017-01-31 10:14 ` Jan Beulich
2017-01-31 14:13 ` Konrad Rzeszutek Wilk
2017-01-31 10:53 ` Andrew Cooper
2017-01-19 6:01 ` [PATCH RESEND v5 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-31 19:52 ` Konrad Rzeszutek Wilk
2017-01-19 6:01 ` [PATCH RESEND v5 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-31 20:17 ` Konrad Rzeszutek Wilk
2017-01-19 6:01 ` [PATCH RESEND v5 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-31 20:29 ` Konrad Rzeszutek Wilk
2017-02-07 2:47 ` Yi Sun
2017-02-07 13:56 ` Konrad Rzeszutek Wilk
2017-01-19 6:01 ` [PATCH RESEND v5 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-31 20:57 ` Konrad Rzeszutek Wilk
2017-02-07 2:51 ` Yi Sun
2017-02-07 13:57 ` Konrad Rzeszutek Wilk
2017-01-19 6:01 ` [PATCH RESEND v5 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 14/24] x86: refactor psr: implement get hw info " Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 15/24] x86: refactor psr: implement get value " Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-01-19 6:01 ` Yi Sun [this message]
2017-01-19 6:01 ` [PATCH RESEND v5 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 20/24] x86: L2 CAT: implement set " Yi Sun
2017-01-19 6:01 ` [PATCH RESEND v5 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-27 15:18 ` Wei Liu
2017-01-19 6:01 ` [PATCH RESEND v5 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-27 15:18 ` Wei Liu
2017-01-19 6:01 ` [PATCH RESEND v5 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-27 15:18 ` Wei Liu
2017-01-19 6:01 ` [PATCH RESEND v5 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-27 15:18 ` Wei Liu
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