From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
he.chen@linux.intel.com, ian.jackson@eu.citrix.com,
Yi Sun <yi.y.sun@linux.intel.com>,
mengxu@cis.upenn.edu, jbeulich@suse.com,
chao.p.peng@linux.intel.com
Subject: [PATCH v6 14/24] x86: refactor psr: implement get hw info flow for CDP.
Date: Wed, 8 Feb 2017 16:16:06 +0800 [thread overview]
Message-ID: <1486541776-8406-15-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1486541776-8406-1-git-send-email-yi.y.sun@linux.intel.com>
This patch implements get HW info flow for CDP including L3 CDP callback
function.
It also changes sysctl function to make it work for CDP.
With this patch, 'psr-hwinfo' can work for L3 CDP.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
---
xen/arch/x86/psr.c | 18 ++++++++++++++++++
xen/arch/x86/sysctl.c | 24 +++++++++++++++++++++---
2 files changed, 39 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 0739c1c..5c307b5 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -267,6 +267,10 @@ static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
case PSR_CBM_TYPE_L3:
feat_type = PSR_SOCKET_L3_CAT;
break;
+ case PSR_CBM_TYPE_L3_DATA:
+ case PSR_CBM_TYPE_L3_CODE:
+ feat_type = PSR_SOCKET_L3_CDP;
+ break;
default:
feat_type = PSR_SOCKET_UNKNOWN;
break;
@@ -525,8 +529,22 @@ static unsigned int l3_cdp_get_cos_max(const struct feat_node *feat)
return feat->info.l3_cdp_info.cos_max;
}
+static bool l3_cdp_get_feat_info(const struct feat_node *feat,
+ uint32_t data[], uint32_t array_len)
+{
+ if ( !data || 3 > array_len )
+ return false;
+
+ data[CBM_LEN] = feat->info.l3_cdp_info.cbm_len;
+ data[COS_MAX] = feat->info.l3_cdp_info.cos_max;
+ data[PSR_FLAG] |= XEN_SYSCTL_PSR_CAT_L3_CDP;
+
+ return true;
+}
+
struct feat_ops l3_cdp_ops = {
.get_cos_max = l3_cdp_get_cos_max,
+ .get_feat_info = l3_cdp_get_feat_info,
};
static void __init parse_psr_bool(char *s, char *value, char *feature,
diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
index e340baa..568bfe9 100644
--- a/xen/arch/x86/sysctl.c
+++ b/xen/arch/x86/sysctl.c
@@ -181,9 +181,27 @@ long arch_do_sysctl(
ret = psr_get_info(sysctl->u.psr_cat_op.target,
PSR_CBM_TYPE_L3, data, 3);
- sysctl->u.psr_cat_op.u.l3_info.cbm_len = data[CBM_LEN];
- sysctl->u.psr_cat_op.u.l3_info.cos_max = data[COS_MAX];
- sysctl->u.psr_cat_op.u.l3_info.flags = data[PSR_FLAG];
+ if ( !ret )
+ {
+ sysctl->u.psr_cat_op.u.l3_info.cbm_len = data[CBM_LEN];
+ sysctl->u.psr_cat_op.u.l3_info.cos_max = data[COS_MAX];
+ sysctl->u.psr_cat_op.u.l3_info.flags = data[PSR_FLAG];
+ } else {
+ /*
+ * Check if CDP is enabled.
+ *
+ * Per spec, L3 CAT and CDP cannot co-exist. So, we need replace
+ * output values to CDP's if it is enabled.
+ */
+ ret = psr_get_info(sysctl->u.psr_cat_op.target,
+ PSR_CBM_TYPE_L3_CODE, data, 3);
+ if ( !ret )
+ {
+ sysctl->u.psr_cat_op.u.l3_info.cbm_len = data[CBM_LEN];
+ sysctl->u.psr_cat_op.u.l3_info.cos_max = data[COS_MAX];
+ sysctl->u.psr_cat_op.u.l3_info.flags = data[PSR_FLAG];
+ }
+ }
if ( !ret && __copy_field_to_guest(u_sysctl, sysctl, u.psr_cat_op) )
ret = -EFAULT;
--
1.9.1
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next prev parent reply other threads:[~2017-02-08 8:19 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-08 8:15 [PATCH v6 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-02-08 8:15 ` [PATCH v6 01/24] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-02-08 15:56 ` Konrad Rzeszutek Wilk
2017-02-09 6:38 ` Yi Sun
2017-02-08 8:15 ` [PATCH v6 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-02-08 8:15 ` [PATCH v6 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-02-08 16:02 ` Konrad Rzeszutek Wilk
2017-02-09 11:05 ` Wei Liu
2017-02-08 8:15 ` [PATCH v6 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-02-08 16:34 ` Konrad Rzeszutek Wilk
2017-02-08 19:03 ` Konrad Rzeszutek Wilk
2017-02-09 11:10 ` Yi Sun
2017-02-09 11:00 ` Yi Sun
2017-02-08 8:15 ` [PATCH v6 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-02-08 16:43 ` Konrad Rzeszutek Wilk
2017-02-08 8:15 ` [PATCH v6 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-02-10 21:34 ` Konrad Rzeszutek Wilk
2017-02-08 8:15 ` [PATCH v6 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-02-09 11:05 ` Wei Liu
2017-02-10 21:38 ` Konrad Rzeszutek Wilk
2017-02-08 8:16 ` [PATCH v6 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-02-08 8:16 ` [PATCH v6 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-02-08 8:16 ` [PATCH v6 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-02-08 8:16 ` [PATCH v6 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-02-08 8:16 ` [PATCH v6 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-02-08 8:16 ` [PATCH v6 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-02-08 8:16 ` Yi Sun [this message]
2017-02-08 8:16 ` [PATCH v6 15/24] x86: refactor psr: implement get value " Yi Sun
2017-02-08 8:16 ` [PATCH v6 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-02-08 8:16 ` [PATCH v6 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-02-08 8:16 ` [PATCH v6 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-02-08 8:16 ` [PATCH v6 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-02-08 8:16 ` [PATCH v6 20/24] x86: L2 CAT: implement set " Yi Sun
2017-02-08 8:16 ` [PATCH v6 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-02-08 8:16 ` [PATCH v6 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-02-08 8:16 ` [PATCH v6 23/24] tools: L2 CAT: support set " Yi Sun
2017-02-08 8:16 ` [PATCH v6 24/24] docs: add L2 CAT description in docs Yi Sun
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