[PATCH v7 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c

[Yi Sun <yi.y.sun@linux.intel.com>]

Hi all,

We plan to bring a new PSR (Platform Shared Resource) feature called
Intel L2 Cache Allocation Technology (L2 CAT) to Xen.

Besides the L2 CAT implementaion, we refactor the psr.c to make it more
flexible to add new features and fulfill the principle, open for extension
but closed for modification. We abstract the general operations of all
features and encapsulate them into a structure. Then, the development
of new feature is simple to mainly implement these callback functions.

The patch set can be found at:
https://github.com/yisun-git/xen.git l2_cat_v7

v7:
- patch 1:
    - correct typo.
    - replace application/VM to domain.
    - amend description of `feat_mask` to make it clearer.
    - update revision.
    - other minor fixes.
- patch 3:
    - alphabetically sort inclusions.
- patch 4:
    - initialize 'l3_cat'.
    - fix typo.
    - correct criteria to call 'free_feature' in cpu_fini_work. Only when
      CPU_STARTING has been done and all CPUs are offline, 'free_feature'
      can be called.
    - remove 'free_feature in 'psr_free' because 'psr_free' should only free
      resources allocated in 'psr_cpu_prepare'. But resources allocated in
      'psr_cpu_prepare' will not be freed to simplify things.
- patch 7:
    - rename '__psr_get' to 'psr_get'.
- patch 13:
    - initialize 'l3_cdp'.
- patch 17:
    - initialize 'l2_cat'.

Yi Sun (24):
  docs: create Cache Allocation Technology (CAT) and Code and Data
    Prioritization (CDP) feature document
  x86: refactor psr: remove L3 CAT/CDP codes.
  x86: refactor psr: implement main data structures.
  x86: refactor psr: implement CPU init and free flow.
  x86: refactor psr: implement Domain init/free and schedule flows.
  x86: refactor psr: implement get hw info flow.
  x86: refactor psr: implement get value flow.
  x86: refactor psr: set value: implement framework.
  x86: refactor psr: set value: assemble features value array.
  x86: refactor psr: set value: implement cos finding flow.
  x86: refactor psr: set value: implement cos id picking flow.
  x86: refactor psr: set value: implement write msr flow.
  x86: refactor psr: implement CPU init and free flow for CDP.
  x86: refactor psr: implement get hw info flow for CDP.
  x86: refactor psr: implement get value flow for CDP.
  x86: refactor psr: implement set value callback functions for CDP.
  x86: L2 CAT: implement CPU init and free flow.
  x86: L2 CAT: implement get hw info flow.
  x86: L2 CAT: implement get value flow.
  x86: L2 CAT: implement set value flow.
  tools: L2 CAT: support get HW info for L2 CAT.
  tools: L2 CAT: support show cbm for L2 CAT.
  tools: L2 CAT: support set cbm for L2 CAT.
  docs: add L2 CAT description in docs.

 docs/features/intel_psr_cat_cdp.pandoc |  454 +++++++++
 docs/man/xl.pod.1.in                   |   25 +-
 docs/misc/xl-psr.markdown              |   10 +-
 tools/libxc/include/xenctrl.h          |    7 +-
 tools/libxc/xc_psr.c                   |   45 +-
 tools/libxl/libxl.h                    |    9 +
 tools/libxl/libxl_psr.c                |   19 +-
 tools/libxl/libxl_types.idl            |    1 +
 tools/libxl/xl_cmdimpl.c               |  169 +++-
 tools/libxl/xl_cmdtable.c              |    6 +-
 xen/arch/x86/cpuid.c                   |    6 -
 xen/arch/x86/domctl.c                  |   49 +-
 xen/arch/x86/psr.c                     | 1607 ++++++++++++++++++++++++++------
 xen/arch/x86/sysctl.c                  |   45 +-
 xen/include/asm-x86/msr-index.h        |    1 +
 xen/include/asm-x86/processor.h        |    7 +
 xen/include/asm-x86/psr.h              |   29 +-
 xen/include/public/domctl.h            |    2 +
 xen/include/public/sysctl.h            |    6 +
 19 files changed, 2086 insertions(+), 411 deletions(-)
 create mode 100644 docs/features/intel_psr_cat_cdp.pandoc

-- 
1.9.1


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel