From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
he.chen@linux.intel.com, ian.jackson@eu.citrix.com,
Yi Sun <yi.y.sun@linux.intel.com>,
mengxu@cis.upenn.edu, jbeulich@suse.com,
chao.p.peng@linux.intel.com
Subject: [PATCH v7 17/24] x86: L2 CAT: implement CPU init and free flow.
Date: Mon, 13 Feb 2017 14:32:29 +0800 [thread overview]
Message-ID: <1486967556-3702-18-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1486967556-3702-1-git-send-email-yi.y.sun@linux.intel.com>
This patch implements the CPU init and free flow for L2 CAT including
L2 CAT initialization callback function.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
---
v7:
- initialize 'l2_cat'.
---
xen/arch/x86/psr.c | 72 +++++++++++++++++++++++++++++++++++++++++++++++
xen/include/asm-x86/psr.h | 1 +
2 files changed, 73 insertions(+)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 8c6af69..60a4b93 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -98,6 +98,7 @@ struct feat_hw_info {
union {
struct psr_cat_hw_info l3_cat_info;
struct psr_cat_hw_info l3_cdp_info;
+ struct psr_cat_hw_info l2_cat_info;
};
};
@@ -235,6 +236,7 @@ static DEFINE_PER_CPU(struct psr_assoc, psr_assoc);
*/
static struct feat_node *feat_l3_cat;
static struct feat_node *feat_l3_cdp;
+static struct feat_node *feat_l2_cat;
/* Common functions. */
static void free_feature(struct psr_socket_info *info)
@@ -681,6 +683,53 @@ struct feat_ops l3_cdp_ops = {
.write_msr = l3_cdp_write_msr,
};
+/* L2 CAT callback functions implementation. */
+static void l2_cat_init_feature(struct cpuid_leaf regs,
+ struct feat_node *feat,
+ struct psr_socket_info *info)
+{
+ struct psr_cat_hw_info l2_cat = { };
+ unsigned int socket;
+
+ /* No valid values so do not enable the feature. */
+ if ( !regs.a || !regs.d )
+ return;
+
+ l2_cat.cbm_len = (regs.a & CAT_CBM_LEN_MASK) + 1;
+ l2_cat.cos_max = min(opt_cos_max, regs.d & CAT_COS_MAX_MASK);
+
+ /* cos=0 is reserved as default cbm(all ones). */
+ feat->cos_reg_val[0] = (1ull << l2_cat.cbm_len) - 1;
+
+ feat->feature = PSR_SOCKET_L2_CAT;
+ ASSERT(!test_bit(PSR_SOCKET_L2_CAT, &info->feat_mask));
+ __set_bit(PSR_SOCKET_L2_CAT, &info->feat_mask);
+
+ feat->info.l2_cat_info = l2_cat;
+
+ info->nr_feat++;
+
+ /* Add this feature into list. */
+ list_add_tail(&feat->list, &info->feat_list);
+
+ socket = cpu_to_socket(smp_processor_id());
+ if ( !opt_cpu_info )
+ return;
+
+ printk(XENLOG_INFO "L2 CAT: enabled on socket %u, cos_max:%u, cbm_len:%u.\n",
+ socket, feat->info.l2_cat_info.cos_max,
+ feat->info.l2_cat_info.cbm_len);
+}
+
+static unsigned int l2_cat_get_cos_max(const struct feat_node *feat)
+{
+ return feat->info.l2_cat_info.cos_max;
+}
+
+struct feat_ops l2_cat_ops = {
+ .get_cos_max = l2_cat_get_cos_max,
+};
+
static void __init parse_psr_bool(char *s, char *value, char *feature,
unsigned int mask)
{
@@ -1454,6 +1503,18 @@ static void cpu_init_work(void)
l3_cat_init_feature(regs, feat, info);
}
}
+
+ cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 0, ®s);
+ if ( regs.b & PSR_RESOURCE_TYPE_L2 )
+ {
+ cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 2, ®s);
+
+ feat = feat_l2_cat;
+ /* psr_cpu_prepare will allocate it on subsequent CPU onlining. */
+ feat_l2_cat = NULL;
+ feat->ops = l2_cat_ops;
+ l2_cat_init_feature(regs, feat, info);
+ }
}
static void cpu_fini_work(unsigned int cpu)
@@ -1505,6 +1566,17 @@ static int psr_cpu_prepare(unsigned int cpu)
return -ENOMEM;
}
+ if ( feat_l2_cat == NULL &&
+ (feat_l2_cat = xzalloc(struct feat_node)) == NULL )
+ {
+ xfree(feat_l3_cat);
+ feat_l3_cat = NULL;
+
+ xfree(feat_l3_cdp);
+ feat_l3_cdp = NULL;
+ return -ENOMEM;
+ }
+
return 0;
}
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index fde7882..d7ed012 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -23,6 +23,7 @@
/* Resource Type Enumeration */
#define PSR_RESOURCE_TYPE_L3 0x2
+#define PSR_RESOURCE_TYPE_L2 0x4
/* L3 Monitoring Features */
#define PSR_CMT_L3_OCCUPANCY 0x1
--
1.9.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
next prev parent reply other threads:[~2017-02-13 6:36 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-13 6:32 [PATCH v7 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-02-13 6:32 ` [PATCH v7 01/24] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-02-14 15:56 ` Konrad Rzeszutek Wilk
2017-02-13 6:32 ` [PATCH v7 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-02-13 6:32 ` [PATCH v7 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-02-13 6:32 ` [PATCH v7 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-02-14 16:01 ` Konrad Rzeszutek Wilk
2017-02-13 6:32 ` [PATCH v7 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-02-13 6:32 ` [PATCH v7 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-02-13 6:32 ` [PATCH v7 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-02-13 6:32 ` [PATCH v7 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-02-13 6:32 ` [PATCH v7 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-02-13 6:32 ` [PATCH v7 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-02-13 6:32 ` [PATCH v7 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-02-13 6:32 ` [PATCH v7 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-02-13 6:32 ` [PATCH v7 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-02-13 6:32 ` [PATCH v7 14/24] x86: refactor psr: implement get hw info " Yi Sun
2017-02-13 6:32 ` [PATCH v7 15/24] x86: refactor psr: implement get value " Yi Sun
2017-02-13 6:32 ` [PATCH v7 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-02-13 6:32 ` Yi Sun [this message]
2017-02-13 6:32 ` [PATCH v7 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-02-13 6:32 ` [PATCH v7 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-02-13 6:32 ` [PATCH v7 20/24] x86: L2 CAT: implement set " Yi Sun
2017-02-13 6:32 ` [PATCH v7 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-02-13 6:32 ` [PATCH v7 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-02-13 6:32 ` [PATCH v7 23/24] tools: L2 CAT: support set " Yi Sun
2017-02-13 6:32 ` [PATCH v7 24/24] docs: add L2 CAT description in docs Yi Sun
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1486967556-3702-18-git-send-email-yi.y.sun@linux.intel.com \
--to=yi.y.sun@linux.intel.com \
--cc=andrew.cooper3@citrix.com \
--cc=chao.p.peng@linux.intel.com \
--cc=dario.faggioli@citrix.com \
--cc=he.chen@linux.intel.com \
--cc=ian.jackson@eu.citrix.com \
--cc=jbeulich@suse.com \
--cc=kevin.tian@intel.com \
--cc=mengxu@cis.upenn.edu \
--cc=wei.liu2@citrix.com \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).