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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xen.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Jan Beulich <JBeulich@suse.com>
Subject: [PATCH 04/10] x86/cpuid: Handle leaf 0x4 in guest_cpuid()
Date: Mon, 20 Feb 2017 11:00:28 +0000	[thread overview]
Message-ID: <1487588434-4359-5-git-send-email-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <1487588434-4359-1-git-send-email-andrew.cooper3@citrix.com>

Leaf 0x4 is reserved by AMD.  For Intel, it is a multi-invocation leaf with
ecx enumerating different cache details.

Add a new union for it in struct cpuid_policy, collect it from hardware in
calculate_raw_policy(), audit it in recalculate_cpuid_policy() and update
guest_cpuid() and update_domain_cpuid_info() to properly insert/extract data.

A lot of the data here will need further auditing/refinement when better
topology support is introduced, but for now, this matches the existing
toolstack behaviour.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
---
 xen/arch/x86/cpuid.c        | 51 +++++++++++++++++++++++++++++++++++++++++++--
 xen/arch/x86/domctl.c       |  8 ++++++-
 xen/include/asm-x86/cpuid.h | 10 +++++++++
 3 files changed, 66 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 3ecb794..ca38d04 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -163,6 +163,9 @@ static void recalculate_xstate(struct cpuid_policy *p)
  */
 static void recalculate_misc(struct cpuid_policy *p)
 {
+    /* Leaves with subleaf unions. */
+    p->basic.raw[0x4] = p->basic.raw[0x7] = p->basic.raw[0xd] = EMPTY_LEAF;
+
     p->basic.raw[0x8] = EMPTY_LEAF;
     p->basic.raw[0xc] = EMPTY_LEAF;
 
@@ -201,6 +204,7 @@ static void recalculate_misc(struct cpuid_policy *p)
         p->basic.apic_id = 0; /* Dynamic. */
 
         zero_leaves(p->basic.raw, 0x2, 0x3);
+        memset(p->cache.raw, 0, sizeof(p->cache.raw));
         p->basic.raw[0x9] = EMPTY_LEAF;
 
         p->extd.vendor_ebx = p->basic.vendor_ebx;
@@ -244,6 +248,25 @@ static void __init calculate_raw_policy(void)
         cpuid_leaf(i, &p->basic.raw[i]);
     }
 
+    if ( p->basic.max_leaf >= 4 )
+    {
+        for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i )
+        {
+            cpuid_count_leaf(4, i, &p->cache.raw[i]);
+
+            if ( p->cache.subleaf[i].type == 0 )
+                break;
+        }
+
+        /*
+         * The choice of CPUID_GUEST_NR_CACHE is arbitrary.  It is expected
+         * that it will eventually need increasing for future hardware.
+         */
+        if ( i == ARRAY_SIZE(p->cache.raw) )
+            printk(XENLOG_WARNING
+                   "CPUID: Insufficient Leaf 4 space for this hardware\n");
+    }
+
     if ( p->basic.max_leaf >= 7 )
     {
         cpuid_count_leaf(7, 0, &p->feat.raw[0]);
@@ -522,6 +545,23 @@ void recalculate_cpuid_policy(struct domain *d)
     recalculate_xstate(p);
     recalculate_misc(p);
 
+    for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i )
+    {
+        if ( p->cache.subleaf[i].type >= 1 &&
+             p->cache.subleaf[i].type <= 3 )
+        {
+            /* Subleaf has a valid cache type. Zero reserved fields. */
+            p->cache.raw[i].a &= 0xffffc3ffu;
+            p->cache.raw[i].d &= 0x00000007u;
+        }
+        else
+        {
+            /* Subleaf is not valid.  Zero the rest of the union. */
+            zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1);
+            break;
+        }
+    }
+
     if ( !p->extd.svm )
         p->extd.raw[0xa] = EMPTY_LEAF;
 
@@ -607,7 +647,7 @@ static void pv_cpuid(uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res)
         *res = EMPTY_LEAF;
         break;
 
-    case 0x0 ... 0x3:
+    case 0x0 ... 0x4:
     case 0x7 ... 0x9:
     case 0xc ... XSTATE_CPUID:
     case 0x80000000 ... 0xffffffff:
@@ -642,7 +682,7 @@ static void hvm_cpuid(uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *res)
             res->a = (res->a & ~0xff) | 3;
         break;
 
-    case 0x0 ... 0x3:
+    case 0x0 ... 0x4:
     case 0x7 ... 0x9:
     case 0xc ... XSTATE_CPUID:
     case 0x80000000 ... 0xffffffff:
@@ -676,6 +716,13 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
 
         switch ( leaf )
         {
+        case 0x4:
+            if ( subleaf >= ARRAY_SIZE(p->cache.raw) )
+                return;
+
+            *res = p->cache.raw[subleaf];
+            break;
+
         case 0x7:
             ASSERT(p->feat.max_subleaf < ARRAY_SIZE(p->feat.raw));
             if ( subleaf > min_t(uint32_t, p->feat.max_subleaf,
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index fc42cb1..aa0d914 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -101,6 +101,10 @@ static int update_domain_cpuid_info(struct domain *d,
     switch ( ctl->input[0] )
     {
     case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1:
+        if ( ctl->input[0] == 4 &&
+             ctl->input[1] >= ARRAY_SIZE(p->cache.raw) )
+            return 0;
+
         if ( ctl->input[0] == 7 &&
              ctl->input[1] >= ARRAY_SIZE(p->feat.raw) )
             return 0;
@@ -129,7 +133,9 @@ static int update_domain_cpuid_info(struct domain *d,
     switch ( ctl->input[0] )
     {
     case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1:
-        if ( ctl->input[0] == 7 )
+        if ( ctl->input[0] == 4 )
+            p->cache.raw[ctl->input[1]] = leaf;
+        else if ( ctl->input[0] == 7 )
             p->feat.raw[ctl->input[1]] = leaf;
         else if ( ctl->input[0] == XSTATE_CPUID )
             p->xstate.raw[ctl->input[1]] = leaf;
diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h
index 6d1990b..14fc95c 100644
--- a/xen/include/asm-x86/cpuid.h
+++ b/xen/include/asm-x86/cpuid.h
@@ -63,6 +63,7 @@ DECLARE_PER_CPU(bool, cpuid_faulting_enabled);
 
 #define CPUID_GUEST_NR_BASIC      (0xdu + 1)
 #define CPUID_GUEST_NR_FEAT       (0u + 1)
+#define CPUID_GUEST_NR_CACHE      (5u + 1)
 #define CPUID_GUEST_NR_XSTATE     (62u + 1)
 #define CPUID_GUEST_NR_EXTD_INTEL (0x8u + 1)
 #define CPUID_GUEST_NR_EXTD_AMD   (0x1cu + 1)
@@ -125,6 +126,15 @@ struct cpuid_policy
         };
     } basic;
 
+    /* Structured cache leaf: 0x00000004[xx] */
+    union {
+        struct cpuid_leaf raw[CPUID_GUEST_NR_CACHE];
+        struct {
+            uint32_t type:4,
+                :28, :32, :32, :32;
+        } subleaf[CPUID_GUEST_NR_CACHE];
+    } cache;
+
     /* Structured feature leaf: 0x00000007[xx] */
     union {
         struct cpuid_leaf raw[CPUID_GUEST_NR_FEAT];
-- 
2.1.4


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  parent reply	other threads:[~2017-02-20 11:00 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-20 11:00 [PATCH 00/10] x86/cpuid: Remove the legacy infrastructure Andrew Cooper
2017-02-20 11:00 ` [PATCH 01/10] x86/cpuid: Disallow policy updates once the domain is running Andrew Cooper
2017-02-21 16:37   ` Jan Beulich
2017-02-20 11:00 ` [PATCH 02/10] x86/gen-cpuid: Clarify the intended meaning of AVX wrt feature dependencies Andrew Cooper
2017-02-21 16:40   ` Jan Beulich
2017-02-21 16:41     ` Andrew Cooper
2017-02-21 16:47     ` Jan Beulich
2017-02-21 16:53       ` Andrew Cooper
2017-02-21 17:07         ` Jan Beulich
2017-02-21 17:12           ` Andrew Cooper
2017-02-21 17:17             ` Jan Beulich
2017-02-21 17:42               ` Andrew Cooper
2017-02-22  7:13                 ` Jan Beulich
2017-02-20 11:00 ` [PATCH 03/10] x86/cpuid: Handle leaf 0x1 in guest_cpuid() Andrew Cooper
2017-02-21 16:59   ` Jan Beulich
2017-02-21 17:13     ` Andrew Cooper
2017-02-21 17:20       ` Jan Beulich
2017-02-21 17:29         ` Andrew Cooper
2017-02-22  7:16           ` Jan Beulich
2017-02-20 11:00 ` Andrew Cooper [this message]
2017-02-21 17:16   ` [PATCH 04/10] x86/cpuid: Handle leaf 0x4 " Jan Beulich
2017-02-21 17:35     ` Andrew Cooper
2017-02-22  7:23       ` Jan Beulich
2017-02-22  7:55         ` Andrew Cooper
2017-03-10 16:27   ` [PATCH v2 " Andrew Cooper
2017-03-13 12:03     ` Jan Beulich
2017-03-13 12:51       ` Andrew Cooper
2017-03-13 13:05         ` Jan Beulich
2017-03-13 13:24           ` Andrew Cooper
2017-03-13 13:36             ` Jan Beulich
2017-02-20 11:00 ` [PATCH 05/10] x86/cpuid: Handle leaf 0x5 " Andrew Cooper
2017-02-21 17:22   ` Jan Beulich
2017-02-20 11:00 ` [PATCH 06/10] x86/cpuid: Handle leaf 0x6 " Andrew Cooper
2017-02-21 17:25   ` Jan Beulich
2017-02-21 17:40     ` Andrew Cooper
2017-02-21 17:44       ` Andrew Cooper
2017-02-22  7:31       ` Jan Beulich
2017-02-22  8:23         ` Andrew Cooper
2017-02-22  9:12           ` Andrew Cooper
2017-02-22  9:26             ` Jan Beulich
2017-02-27 14:30               ` Andrew Cooper
2017-03-10 16:32   ` [PATCH v2 " Andrew Cooper
2017-03-13 12:04     ` Jan Beulich
2017-02-20 11:00 ` [PATCH 07/10] x86/cpuid: Handle leaf 0xa " Andrew Cooper
2017-02-22  9:11   ` Jan Beulich
2017-02-20 11:00 ` [PATCH 08/10] x86/cpuid: Handle leaf 0xb " Andrew Cooper
2017-02-22  9:16   ` Jan Beulich
2017-02-22 10:22     ` Andrew Cooper
2017-02-22 10:37       ` Jan Beulich
2017-02-27 15:05         ` Andrew Cooper
2017-03-10 16:44   ` [PATCH v2 " Andrew Cooper
2017-03-13 12:13     ` Jan Beulich
2017-02-20 11:00 ` [PATCH 09/10] x86/cpuid: Drop legacy CPUID infrastructure Andrew Cooper
2017-02-22  9:19   ` Jan Beulich
2017-02-20 11:00 ` [PATCH 10/10] x86/cpuid: Always enable faulting for the control domain Andrew Cooper
2017-02-22  9:23   ` Jan Beulich
2017-02-22 10:00     ` Andrew Cooper
2017-02-22 10:10       ` Jan Beulich
2017-02-27 15:10         ` Andrew Cooper
2017-02-28  9:31           ` Jan Beulich
2017-03-10 17:10             ` Andrew Cooper
2017-03-13 11:48               ` Jan Beulich
2017-03-14 15:06                 ` Wei Liu
2017-03-14 15:13                   ` Jan Beulich
2017-03-14 16:05                     ` Wei Liu

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