From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xen.org>
Cc: George Dunlap <george.dunlap@eu.citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Tim Deegan <tim@xen.org>, Jan Beulich <JBeulich@suse.com>
Subject: [PATCH 5/7] x86/shadow: Use the pagewalk reserved bits helpers
Date: Mon, 27 Feb 2017 14:03:16 +0000 [thread overview]
Message-ID: <1488204198-23948-6-git-send-email-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <1488204198-23948-1-git-send-email-andrew.cooper3@citrix.com>
The shadow logic should never create a shadow of a guest PTE which contains
reserved bits from the guests point of view. Such a shadowed entry might not
cause #PF[RSVD] when walked by hardware, thus won't behave architecturally
from the guests point of view.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Tim Deegan <tim@xen.org>
CC: George Dunlap <george.dunlap@eu.citrix.com>
---
xen/arch/x86/mm/shadow/multi.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c
index 7c6b017..702835b 100644
--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -2157,7 +2157,8 @@ static int validate_gl4e(struct vcpu *v, void *new_ge, mfn_t sl4mfn, void *se)
perfc_incr(shadow_validate_gl4e_calls);
- if ( guest_l4e_get_flags(new_gl4e) & _PAGE_PRESENT )
+ if ( (guest_l4e_get_flags(new_gl4e) & _PAGE_PRESENT) &&
+ !guest_l4e_rsvd_bits(v, new_gl4e) )
{
gfn_t gl3gfn = guest_l4e_get_gfn(new_gl4e);
mfn_t gl3mfn = get_gfn_query_unlocked(d, gfn_x(gl3gfn), &p2mt);
@@ -2215,7 +2216,8 @@ static int validate_gl3e(struct vcpu *v, void *new_ge, mfn_t sl3mfn, void *se)
perfc_incr(shadow_validate_gl3e_calls);
- if ( guest_l3e_get_flags(new_gl3e) & _PAGE_PRESENT )
+ if ( (guest_l3e_get_flags(new_gl3e) & _PAGE_PRESENT) &&
+ !guest_l3e_rsvd_bits(v, new_gl3e) )
{
gfn_t gl2gfn = guest_l3e_get_gfn(new_gl3e);
mfn_t gl2mfn = get_gfn_query_unlocked(d, gfn_x(gl2gfn), &p2mt);
@@ -2248,7 +2250,8 @@ static int validate_gl2e(struct vcpu *v, void *new_ge, mfn_t sl2mfn, void *se)
perfc_incr(shadow_validate_gl2e_calls);
- if ( guest_l2e_get_flags(new_gl2e) & _PAGE_PRESENT )
+ if ( (guest_l2e_get_flags(new_gl2e) & _PAGE_PRESENT) &&
+ !guest_l2e_rsvd_bits(v, new_gl2e) )
{
gfn_t gl1gfn = guest_l2e_get_gfn(new_gl2e);
if ( guest_supports_superpages(v) &&
@@ -2288,8 +2291,7 @@ static int validate_gl1e(struct vcpu *v, void *new_ge, mfn_t sl1mfn, void *se)
shadow_l1e_t new_sl1e;
guest_l1e_t new_gl1e = *(guest_l1e_t *)new_ge;
shadow_l1e_t *sl1p = se;
- gfn_t gfn;
- mfn_t gmfn;
+ mfn_t gmfn = INVALID_MFN;
p2m_type_t p2mt;
int result = 0;
#if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC)
@@ -2298,8 +2300,13 @@ static int validate_gl1e(struct vcpu *v, void *new_ge, mfn_t sl1mfn, void *se)
perfc_incr(shadow_validate_gl1e_calls);
- gfn = guest_l1e_get_gfn(new_gl1e);
- gmfn = get_gfn_query_unlocked(d, gfn_x(gfn), &p2mt);
+ if ( (guest_l1e_get_flags(new_gl1e) & _PAGE_PRESENT) &&
+ !guest_l1e_rsvd_bits(v, new_gl1e) )
+ {
+ gfn_t gfn = guest_l1e_get_gfn(new_gl1e);
+
+ gmfn = get_gfn_query_unlocked(d, gfn_x(gfn), &p2mt);
+ }
l1e_propagate_from_guest(v, new_gl1e, gmfn, &new_sl1e, ft_prefetch, p2mt);
result |= shadow_set_l1e(d, sl1p, new_sl1e, p2mt, sl1mfn);
--
2.1.4
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next prev parent reply other threads:[~2017-02-27 14:03 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-27 14:03 [PATCH 0/7] Fixes to pagetable handling Andrew Cooper
2017-02-27 14:03 ` [PATCH 1/7] x86/hvm: Correctly identify implicit supervisor accesses Andrew Cooper
2017-03-01 15:05 ` Jan Beulich
2017-03-02 16:14 ` Tim Deegan
2017-03-07 10:46 ` George Dunlap
2017-03-07 10:51 ` Andrew Cooper
2017-03-07 15:00 ` Paul Durrant
2017-02-27 14:03 ` [PATCH 2/7] x86/shadow: Try to correctly " Andrew Cooper
2017-03-01 15:11 ` Jan Beulich
2017-03-02 16:14 ` Tim Deegan
2017-03-07 11:26 ` George Dunlap
2017-03-07 11:55 ` Andrew Cooper
2017-02-27 14:03 ` [PATCH 3/7] x86/pagewalk: Helpers for reserved bit handling Andrew Cooper
2017-03-01 15:57 ` Jan Beulich
2017-03-02 12:23 ` Andrew Cooper
2017-03-02 14:12 ` Tim Deegan
2017-03-02 14:17 ` Andrew Cooper
2017-03-02 15:09 ` Tim Deegan
2017-03-02 15:14 ` Andrew Cooper
2017-03-02 16:15 ` Tim Deegan
2017-02-27 14:03 ` [PATCH 4/7] x86/hvm: Adjust hvm_nx_enabled() to match how Xen behaves Andrew Cooper
2017-03-01 16:00 ` Jan Beulich
2017-02-27 14:03 ` Andrew Cooper [this message]
2017-03-01 16:03 ` [PATCH 5/7] x86/shadow: Use the pagewalk reserved bits helpers Jan Beulich
2017-03-02 12:26 ` Andrew Cooper
2017-03-02 12:51 ` Jan Beulich
2017-03-02 12:56 ` Andrew Cooper
2017-03-02 13:19 ` Jan Beulich
2017-03-02 14:32 ` Andrew Cooper
2017-03-06 9:26 ` Tim Deegan
2017-03-02 14:33 ` Tim Deegan
2017-02-27 14:03 ` [PATCH 6/7] x86/pagewalk: Consistently use guest_walk_*() helpers for translation Andrew Cooper
2017-03-01 16:22 ` Jan Beulich
2017-03-01 16:33 ` Andrew Cooper
2017-03-01 16:41 ` Jan Beulich
2017-03-02 16:15 ` Tim Deegan
2017-03-06 18:25 ` George Dunlap
2017-02-27 14:03 ` [PATCH 7/7] x86/pagewalk: Re-implement the pagetable walker Andrew Cooper
2017-03-02 11:52 ` Jan Beulich
2017-03-02 12:00 ` Andrew Cooper
2017-03-02 12:54 ` Jan Beulich
2017-03-02 16:16 ` Tim Deegan
2017-03-06 18:28 ` George Dunlap
2017-03-06 18:33 ` Andrew Cooper
2017-03-06 18:39 ` George Dunlap
2017-03-07 12:57 ` George Dunlap
2017-03-01 16:24 ` [PATCH 0/7] Fixes to pagetable handling Jan Beulich
2017-03-01 16:32 ` Andrew Cooper
2017-03-06 16:42 ` [RFC XTF PATCH] Pagetable Emulation testing Andrew Cooper
2017-03-13 15:45 ` Jan Beulich
2017-03-13 17:48 ` Andrew Cooper
2017-03-14 11:17 ` Jan Beulich
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