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From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	he.chen@linux.intel.com, ian.jackson@eu.citrix.com,
	Yi Sun <yi.y.sun@linux.intel.com>,
	mengxu@cis.upenn.edu, jbeulich@suse.com,
	chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: [PATCH v9 13/25] x86: refactor psr: L3 CAT: set value: implement write msr flow.
Date: Thu, 16 Mar 2017 19:08:03 +0800	[thread overview]
Message-ID: <1489662495-5375-14-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1489662495-5375-1-git-send-email-yi.y.sun@linux.intel.com>

Continue from previous patch:
'x86: refactor psr: L3 CAT: set value: implement cos id picking flow.'

We have got the feature value and COS ID to set. Then, we write MSR of the
designated feature.

Till now, set value process is completed.

Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
---
v9:
    - replace feature list handling to feature array handling.
      (suggested by Roger Pau)
    - add 'array_len' in 'struct cos_write_info' and check if val array
      exceeds it.
    - modify 'write_psr_msr' flow only to set one value a time. No need to
      set whole feature array values.
    - modify patch title to indicate 'L3 CAT'.
      (suggested by Jan Beulich)
    - changes about 'uint64_t' to 'uint32_t'.
      (suggested by Jan Beulich)
v8:
    - modify 'write_msr' callback function to 'void' because we have to set
      all features' cbm. When input cos exceeds some features' cos_max, just
      skip them but not break the iteration.
v5:
    - modify commit message to provide exact patch name to continue from.
      (suggested by Jan Beulich)
    - modify return value of callback functions because we do not need them
      to return number of entries the feature uses. In caller, we call
      'get_cos_num' to get the number of entries the feature uses.
      (suggested by Jan Beulich)
    - move type check out from callback functions to caller.
      (suggested by Jan Beulich)
    - modify variables names to make them better, e.g. 'feat_tmp' to 'feat'.
      (suggested by Jan Beulich)
    - correct code format.
      (suggested by Jan Beulich)
v4:
    - create this patch to make codes easier understand.
      (suggested by Jan Beulich)
---
 xen/arch/x86/psr.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 69 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index d4db407..2bc7f3c 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -149,6 +149,10 @@ struct feat_node {
         bool (*fits_cos_max)(const uint32_t val[],
                              const struct feat_node *feat,
                              unsigned int cos);
+
+        /* write_msr is used to write out feature MSR register. */
+        void (*write_msr)(unsigned int cos, uint32_t val,
+                          enum cbm_type type, struct feat_node *feat);
     } ops;
 
     /* Encapsulate feature specific HW info here. */
@@ -421,6 +425,18 @@ static bool cat_fits_cos_max(const uint32_t val[],
 }
 
 /* L3 CAT ops */
+static void l3_cat_write_msr(unsigned int cos, uint32_t val,
+                             enum cbm_type type, struct feat_node *feat)
+{
+    if ( feat->cos_reg_val[cos] != val )
+    {
+        feat->cos_reg_val[cos] = val;
+        wrmsrl(MSR_IA32_PSR_L3_MASK(cos), (uint64_t)val);
+    }
+
+    return;
+}
+
 static const struct feat_ops l3_cat_ops = {
     .get_cos_max = cat_get_cos_max,
     .get_feat_info = cat_get_feat_info,
@@ -429,6 +445,7 @@ static const struct feat_ops l3_cat_ops = {
     .set_new_val = cat_set_new_val,
     .compare_val = cat_compare_val,
     .fits_cos_max = cat_fits_cos_max,
+    .write_msr = l3_cat_write_msr,
 };
 
 static void __init parse_psr_bool(char *s, char *value, char *feature,
@@ -957,11 +974,62 @@ static int pick_avail_cos(const struct psr_socket_info *info,
     return -EOVERFLOW;
 }
 
+static unsigned int get_socket_cpu(unsigned int socket)
+{
+    if ( likely(socket < nr_sockets) )
+        return cpumask_any(socket_cpumask[socket]);
+
+    return nr_cpu_ids;
+}
+
+struct cos_write_info
+{
+    unsigned int cos;
+    struct feat_node *feature;
+    uint32_t val;
+    enum cbm_type type;
+};
+
+static void do_write_psr_msr(void *data)
+{
+    struct cos_write_info *info = (struct cos_write_info *)data;
+    unsigned int cos            = info->cos;
+    struct feat_node *feat      = info->feature;
+
+    if ( !feat )
+        return;
+
+    if ( cos > feat->ops.get_cos_max(feat) )
+        return;
+
+    feat->ops.write_msr(cos, info->val, info->type, feat);
+}
+
 static int write_psr_msr(unsigned int socket, unsigned int cos,
                          uint32_t val, enum cbm_type type,
                          enum psr_feat_type feat_type)
 {
-    return -ENOENT;
+    struct psr_socket_info *info = get_socket_info(socket);
+    struct cos_write_info data =
+    {
+        .cos = cos,
+        .feature = info->features[feat_type],
+        .val = val,
+        .type = type,
+    };
+
+    if ( socket == cpu_to_socket(smp_processor_id()) )
+        do_write_psr_msr(&data);
+    else
+    {
+        unsigned int cpu = get_socket_cpu(socket);
+
+        if ( cpu >= nr_cpu_ids )
+            return -ENOTSOCK;
+        on_selected_cpus(cpumask_of(cpu), do_write_psr_msr, &data, 1);
+    }
+
+    return 0;
 }
 
 int psr_set_val(struct domain *d, unsigned int socket,
-- 
1.9.1


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  parent reply	other threads:[~2017-03-16 11:14 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-16 11:07 [PATCH v9 00/25] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-03-16 11:07 ` [PATCH v9 01/25] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-03-16 11:07 ` [PATCH v9 02/25] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-03-16 11:07 ` [PATCH v9 03/25] x86: refactor psr: implement main data structures Yi Sun
2017-03-24 16:19   ` Jan Beulich
2017-03-27  2:38     ` Yi Sun
2017-03-27  6:20       ` Jan Beulich
2017-03-27  7:12         ` Yi Sun
2017-03-27  7:37           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 04/25] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-03-24 16:22   ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow Yi Sun
2017-03-24 16:52   ` Jan Beulich
2017-03-27  4:41     ` Yi Sun
2017-03-27  6:34       ` Jan Beulich
2017-03-27  8:16         ` Yi Sun
2017-03-27  8:43           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 06/25] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-03-16 11:07 ` [PATCH v9 07/25] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-03-27  9:07   ` Jan Beulich
2017-03-27 12:24     ` Yi Sun
2017-03-27 12:51       ` Jan Beulich
2017-03-27 13:19         ` Yi Sun
2017-03-27 13:32           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 08/25] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-03-27  9:23   ` Jan Beulich
2017-03-27 12:59     ` Yi Sun
2017-03-27 13:34       ` Jan Beulich
2017-03-28  2:13         ` Yi Sun
2017-03-28  8:10           ` Jan Beulich
2017-03-16 11:07 ` [PATCH v9 09/25] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-03-27  9:59   ` Jan Beulich
2017-03-28  1:21     ` Yi Sun
2017-03-28  8:21       ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 10/25] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-03-27 10:17   ` Jan Beulich
2017-03-28  3:12     ` Yi Sun
2017-03-28  8:05       ` Yi Sun
2017-03-28  8:36         ` Jan Beulich
2017-03-28  9:11           ` Yi Sun
2017-03-28  9:20             ` Jan Beulich
2017-03-28 10:18               ` Yi Sun
2017-03-28 10:39                 ` Jan Beulich
2017-03-28  8:34       ` Jan Beulich
2017-03-28 10:12         ` Yi Sun
2017-03-28 10:36           ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 11/25] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-03-27 10:28   ` Jan Beulich
2017-03-28  3:26     ` Yi Sun
2017-03-28  8:41       ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 12/25] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-03-27 10:37   ` Jan Beulich
2017-03-28  4:58     ` Yi Sun
2017-03-28  8:45       ` Jan Beulich
2017-03-28 10:31         ` Yi Sun
2017-03-28 10:40           ` Jan Beulich
2017-03-28 11:59             ` Yi Sun
2017-03-28 12:20               ` Jan Beulich
2017-03-29  1:20                 ` Yi Sun
2017-03-29  1:36                   ` Yi Sun
2017-03-29  9:57                     ` Jan Beulich
2017-03-30  1:37                       ` Yi Sun
2017-03-30  1:39                         ` Yi Sun
2017-03-30 11:55                         ` Jan Beulich
2017-03-30 12:10                           ` Yi Sun
2017-03-31  8:47                             ` Jan Beulich
2017-03-31  9:12                               ` Yi Sun
2017-03-31  9:18                                 ` Yi Sun
2017-03-31 10:19                                 ` Jan Beulich
2017-03-31 12:40                                   ` Yi Sun
2017-03-31 12:51                                     ` Jan Beulich
2017-03-31 13:22                                       ` Yi Sun
2017-03-31 14:35                                         ` Jan Beulich
2017-03-31 14:46                                           ` Yi Sun
2017-03-16 11:08 ` Yi Sun [this message]
2017-03-27 10:46   ` [PATCH v9 13/25] x86: refactor psr: L3 CAT: set value: implement write msr flow Jan Beulich
2017-03-28  5:06     ` Yi Sun
2017-03-28  8:48       ` Jan Beulich
2017-03-28 10:20         ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 14/25] x86: refactor psr: CDP: implement CPU init and free flow Yi Sun
2017-03-27 13:58   ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 15/25] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-03-27 14:08   ` Jan Beulich
2017-03-28  5:13     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 16/25] x86: refactor psr: CDP: implement get value flow Yi Sun
2017-03-16 11:08 ` [PATCH v9 17/25] x86: refactor psr: CDP: implement set value callback functions Yi Sun
2017-03-27 14:17   ` Jan Beulich
2017-03-28  5:14     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 18/25] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-03-16 11:08 ` [PATCH v9 19/25] x86: L2 CAT: implement get hw info flow Yi Sun
2017-03-27 14:38   ` Jan Beulich
2017-03-28  5:16     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 20/25] x86: L2 CAT: implement get value flow Yi Sun
2017-03-27 14:39   ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 21/25] x86: L2 CAT: implement set " Yi Sun
2017-03-27 14:40   ` Jan Beulich
2017-03-16 11:08 ` [PATCH v9 22/25] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-03-16 11:08 ` [PATCH v9 23/25] tools: L2 CAT: support show cbm " Yi Sun
2017-03-16 11:08 ` [PATCH v9 24/25] tools: L2 CAT: support set " Yi Sun
2017-03-28 14:04   ` Wei Liu
2017-03-29  1:21     ` Yi Sun
2017-03-16 11:08 ` [PATCH v9 25/25] docs: add L2 CAT description in docs Yi Sun
2017-03-16 11:20 ` [PATCH v9 00/25] Enable L2 Cache Allocation Technology & Refactor psr.c Jan Beulich
2017-03-17  1:29   ` Yi Sun
2017-03-17  7:25     ` Jan Beulich

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