From: Paul Durrant <paul.durrant@citrix.com>
To: xen-devel@lists.xenproject.org
Cc: Wei Liu <wei.liu2@citrix.com>,
Paul Durrant <paul.durrant@citrix.com>,
Ian Jackson <ian.jackson@eu.citrix.com>,
Jan Beulich <jbeulich@suse.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: [PATCH 7/7] x86/viridian: implement the crash MSRs
Date: Fri, 17 Mar 2017 09:57:13 +0000 [thread overview]
Message-ID: <1489744633-28760-8-git-send-email-paul.durrant@citrix.com> (raw)
In-Reply-To: <1489744633-28760-1-git-send-email-paul.durrant@citrix.com>
Section 2.4.4 of the Hypervisor Top Level Functional Specification states
that enabling bit 10 in EDX of CPUID leaf 3 advertises to Windows a set
of MSRs into which it can write crash information.
This patch advertises that bit and implements the MSRs such that Xen can
log the information if a Windows guest crashes.
Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
---
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Paul Durrant <paul.durrant@citrix.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
docs/man/xl.cfg.pod.5.in | 10 ++++--
tools/libxl/libxl.h | 6 ++++
tools/libxl/libxl_dom.c | 4 +++
tools/libxl/libxl_types.idl | 1 +
xen/arch/x86/hvm/viridian.c | 67 ++++++++++++++++++++++++++++++++++++++
xen/include/asm-x86/hvm/viridian.h | 1 +
xen/include/public/hvm/params.h | 7 +++-
7 files changed, 93 insertions(+), 3 deletions(-)
diff --git a/docs/man/xl.cfg.pod.5.in b/docs/man/xl.cfg.pod.5.in
index 505c111..3522294 100644
--- a/docs/man/xl.cfg.pod.5.in
+++ b/docs/man/xl.cfg.pod.5.in
@@ -1605,11 +1605,17 @@ per-vcpu event channel upcall vectors.
Note that this enlightenment will have no effect if the guest is
using APICv posted interrupts.
+=item B<crash_ctl>
+
+This group incorporates the crash control MSRs. These enlightenments
+allow Windows to write crash information such that it can be logged
+by Xen.
+
=item B<defaults>
This is a special value that enables the default set of groups, which
-is currently the B<base>, B<freq>, B<time_ref_count> and B<apic_assist>
-groups.
+is currently the B<base>, B<freq>, B<time_ref_count>, B<apic_assist>
+and B<crash_ctl> groups.
=item B<all>
diff --git a/tools/libxl/libxl.h b/tools/libxl/libxl.h
index 92f1751..55ed872 100644
--- a/tools/libxl/libxl.h
+++ b/tools/libxl/libxl.h
@@ -288,6 +288,12 @@
#define LIBXL_HAVE_SCHED_CREDIT2_PARAMS 1
/*
+ * LIBXL_HAVE_CRASH_CTL indicates that the 'crash_ctl' value
+ * is present in the viridian enlightenment enumeration.
+ */
+#define LIBXL_HAVE_CRASH_CTL 1
+
+/*
* libxl ABI compatibility
*
* The only guarantee which libxl makes regarding ABI compatibility
diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c
index d519c8d..fd77c21 100644
--- a/tools/libxl/libxl_dom.c
+++ b/tools/libxl/libxl_dom.c
@@ -214,6 +214,7 @@ static int hvm_set_viridian_features(libxl__gc *gc, uint32_t domid,
libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_FREQ);
libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_TIME_REF_COUNT);
libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST);
+ libxl_bitmap_set(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL);
}
libxl_for_each_set_bit(v, info->u.hvm.viridian_enable) {
@@ -259,6 +260,9 @@ static int hvm_set_viridian_features(libxl__gc *gc, uint32_t domid,
if (libxl_bitmap_test(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_APIC_ASSIST))
mask |= HVMPV_apic_assist;
+ if (libxl_bitmap_test(&enlightenments, LIBXL_VIRIDIAN_ENLIGHTENMENT_CRASH_CTL))
+ mask |= HVMPV_crash_ctl;
+
if (mask != 0 &&
xc_hvm_param_set(CTX->xch,
domid,
diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl
index a612d1f..e5c39e9 100644
--- a/tools/libxl/libxl_types.idl
+++ b/tools/libxl/libxl_types.idl
@@ -224,6 +224,7 @@ libxl_viridian_enlightenment = Enumeration("viridian_enlightenment", [
(3, "reference_tsc"),
(4, "hcall_remote_tlb_flush"),
(5, "apic_assist"),
+ (6, "crash_ctl"),
])
libxl_hdtype = Enumeration("hdtype", [
diff --git a/xen/arch/x86/hvm/viridian.c b/xen/arch/x86/hvm/viridian.c
index e7cc4e4..65a50a6 100644
--- a/xen/arch/x86/hvm/viridian.c
+++ b/xen/arch/x86/hvm/viridian.c
@@ -160,6 +160,19 @@ typedef struct {
uint64_t Reserved8:10;
} HV_PARTITION_PRIVILEGE_MASK;
+typedef union _HV_CRASH_CTL_REG_CONTENTS
+{
+ uint64_t AsUINT64;
+ struct
+ {
+ uint64_t Reserved:63;
+ uint64_t CrashNotify:1;
+ };
+} HV_CRASH_CTL_REG_CONTENTS;
+
+/* Viridian CPUID leaf 3, Hypervisor Feature Indication */
+#define CPUID3D_CRASH_MSRS (1 << 10)
+
/* Viridian CPUID leaf 4: Implementation Recommendations. */
#define CPUID4A_HCALL_REMOTE_TLB_FLUSH (1 << 2)
#define CPUID4A_MSR_BASED_APIC (1 << 3)
@@ -234,6 +247,10 @@ void cpuid_viridian_leaves(const struct vcpu *v, uint32_t leaf,
res->a = u.lo;
res->b = u.hi;
+
+ if ( viridian_feature_mask(d) & HVMPV_crash_ctl )
+ res->d = CPUID3D_CRASH_MSRS;
+
break;
}
@@ -603,6 +620,37 @@ int wrmsr_viridian_regs(uint32_t idx, uint64_t val)
update_reference_tsc(d, 1);
break;
+ case HV_X64_MSR_CRASH_P0:
+ case HV_X64_MSR_CRASH_P1:
+ case HV_X64_MSR_CRASH_P2:
+ case HV_X64_MSR_CRASH_P3:
+ case HV_X64_MSR_CRASH_P4:
+ BUILD_BUG_ON(HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0 >
+ ARRAY_SIZE(d->arch.hvm_domain.viridian.crash_param));
+
+ idx -= HV_X64_MSR_CRASH_P0;
+ d->arch.hvm_domain.viridian.crash_param[idx] = val;
+ break;
+
+ case HV_X64_MSR_CRASH_CTL:
+ {
+ HV_CRASH_CTL_REG_CONTENTS ctl;
+
+ ctl.AsUINT64 = val;
+
+ if ( !ctl.CrashNotify )
+ break;
+
+ printk(XENLOG_G_INFO "d%d: VIRIDIAN CRASH: %lx %lx %lx %lx %lx\n",
+ d->domain_id,
+ d->arch.hvm_domain.viridian.crash_param[0],
+ d->arch.hvm_domain.viridian.crash_param[1],
+ d->arch.hvm_domain.viridian.crash_param[2],
+ d->arch.hvm_domain.viridian.crash_param[3],
+ d->arch.hvm_domain.viridian.crash_param[4]);
+ break;
+ }
+
default:
if (idx >= VIRIDIAN_MSR_MIN && idx <= VIRIDIAN_MSR_MAX)
gdprintk(XENLOG_WARNING, "unimplemented MSR %08x\n",
@@ -730,6 +778,25 @@ int rdmsr_viridian_regs(uint32_t idx, uint64_t *val)
break;
}
+ case HV_X64_MSR_CRASH_P0:
+ case HV_X64_MSR_CRASH_P1:
+ case HV_X64_MSR_CRASH_P2:
+ case HV_X64_MSR_CRASH_P3:
+ case HV_X64_MSR_CRASH_P4:
+ idx -= HV_X64_MSR_CRASH_P0;
+ *val = d->arch.hvm_domain.viridian.crash_param[idx];
+ break;
+
+ case HV_X64_MSR_CRASH_CTL:
+ {
+ HV_CRASH_CTL_REG_CONTENTS ctl;
+
+ ctl.CrashNotify = 1;
+
+ *val = ctl.AsUINT64;
+ break;
+ }
+
default:
if (idx >= VIRIDIAN_MSR_MIN && idx <= VIRIDIAN_MSR_MAX)
gdprintk(XENLOG_WARNING, "unimplemented MSR %08x\n",
diff --git a/xen/include/asm-x86/hvm/viridian.h b/xen/include/asm-x86/hvm/viridian.h
index 18f1f1a..6de8a05 100644
--- a/xen/include/asm-x86/hvm/viridian.h
+++ b/xen/include/asm-x86/hvm/viridian.h
@@ -96,6 +96,7 @@ struct viridian_domain
union viridian_hypercall_gpa hypercall_gpa;
struct viridian_time_ref_count time_ref_count;
union viridian_reference_tsc reference_tsc;
+ uint64_t crash_param[5];
};
void cpuid_viridian_leaves(const struct vcpu *v, uint32_t leaf,
diff --git a/xen/include/public/hvm/params.h b/xen/include/public/hvm/params.h
index 58c8478..19c9eb8 100644
--- a/xen/include/public/hvm/params.h
+++ b/xen/include/public/hvm/params.h
@@ -135,13 +135,18 @@
#define _HVMPV_apic_assist 5
#define HVMPV_apic_assist (1 << _HVMPV_apic_assist)
+/* Enable crash MSRs */
+#define _HVMPV_crash_ctl 6
+#define HVMPV_crash_ctl (1 << _HVMPV_crash_ctl)
+
#define HVMPV_feature_mask \
(HVMPV_base_freq | \
HVMPV_no_freq | \
HVMPV_time_ref_count | \
HVMPV_reference_tsc | \
HVMPV_hcall_remote_tlb_flush | \
- HVMPV_apic_assist)
+ HVMPV_apic_assist | \
+ HVMPV_crash_ctl)
#endif
--
2.1.4
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next prev parent reply other threads:[~2017-03-17 9:57 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-17 9:57 [PATCH 0/7] x86/viridian updates Paul Durrant
2017-03-17 9:57 ` [PATCH 1/7] x86/viridian: update to version 5.0a of the specification Paul Durrant
2017-03-20 11:27 ` Jan Beulich
2017-03-20 11:43 ` Paul Durrant
2017-03-20 11:54 ` Jan Beulich
2017-03-17 9:57 ` [PATCH 2/7] x86/viridian: fix xen-hvmcrash when vp_assist page is present Paul Durrant
2017-03-20 11:36 ` Jan Beulich
2017-03-20 11:50 ` Paul Durrant
2017-03-20 13:42 ` Paul Durrant
2017-03-20 13:58 ` Jan Beulich
2017-03-17 9:57 ` [PATCH 3/7] x86/viridian: don't put Xen version information in CPUID leaf 2 Paul Durrant
2017-03-20 11:41 ` Jan Beulich
2017-03-20 11:57 ` Paul Durrant
2017-03-20 12:03 ` Jan Beulich
2017-03-20 13:08 ` Paul Durrant
2017-03-20 13:20 ` Jan Beulich
2017-03-17 9:57 ` [PATCH 4/7] x86/viridian: get rid of the magic numbers in CPUID leaves 1 and 2 Paul Durrant
2017-03-20 12:15 ` Jan Beulich
2017-03-20 12:56 ` Paul Durrant
2017-03-17 9:57 ` [PATCH 5/7] x86/viridian: add warnings for unimplemented hypercalls and MSRs Paul Durrant
2017-03-20 12:21 ` Jan Beulich
2017-03-20 12:54 ` Paul Durrant
2017-03-17 9:57 ` [PATCH 6/7] x86/viridian: make the threshold for HvNotifyLongSpinWait tunable Paul Durrant
2017-03-20 12:26 ` Jan Beulich
2017-03-20 12:51 ` Paul Durrant
2017-03-20 13:22 ` Jan Beulich
2017-03-20 17:03 ` Andrew Cooper
2017-03-20 17:07 ` Paul Durrant
2017-03-17 9:57 ` Paul Durrant [this message]
2017-03-20 12:38 ` [PATCH 7/7] x86/viridian: implement the crash MSRs Jan Beulich
2017-03-20 12:48 ` Paul Durrant
2017-03-20 13:29 ` Jan Beulich
2017-03-20 13:33 ` Paul Durrant
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