From: Bhupinder Thakur <bhupinder.thakur@linaro.org>
To: xen-devel@lists.xenproject.org
Cc: Julien Grall <julien.grall@arm.com>,
Stefano Stabellini <sstabellini@kernel.org>
Subject: [PATCH 01/12 v3] xen/arm: vpl011: Move vgic register access functions to vreg.h
Date: Wed, 10 May 2017 19:54:51 +0530 [thread overview]
Message-ID: <1494426293-32481-1-git-send-email-bhupinder.thakur@linaro.org> (raw)
These functions are generic in nature and can be reused by other emulation
code in Xen. One recent example is pl011 emulation, which needs similar
funictions to read/write the registers.
This patch moves the register access function definitions from vgic.h to
vreg.h.
Signed-off-by: Bhupinder Thakur <bhupinder.thakur@linaro.org>
---
xen/include/asm-arm/vgic.h | 99 +---------------------------------------------
xen/include/asm-arm/vreg.h | 98 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 99 insertions(+), 98 deletions(-)
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 544867a..c838298 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -20,6 +20,7 @@
#include <xen/bitops.h>
#include <asm/mmio.h>
+#include <asm-arm/vreg.h>
struct pending_irq
{
@@ -171,104 +172,6 @@ static inline int REG_RANK_NR(int b, uint32_t n)
}
}
-#define VGIC_REG_MASK(size) ((~0UL) >> (BITS_PER_LONG - ((1 << (size)) * 8)))
-
-/*
- * The check on the size supported by the register has to be done by
- * the caller of vgic_regN_*.
- *
- * vgic_reg_* should never be called directly. Instead use the vgic_regN_*
- * according to size of the emulated register
- *
- * Note that the alignment fault will always be taken in the guest
- * (see B3.12.7 DDI0406.b).
- */
-static inline register_t vgic_reg_extract(unsigned long reg,
- unsigned int offset,
- enum dabt_size size)
-{
- reg >>= 8 * offset;
- reg &= VGIC_REG_MASK(size);
-
- return reg;
-}
-
-static inline void vgic_reg_update(unsigned long *reg, register_t val,
- unsigned int offset,
- enum dabt_size size)
-{
- unsigned long mask = VGIC_REG_MASK(size);
- int shift = offset * 8;
-
- *reg &= ~(mask << shift);
- *reg |= ((unsigned long)val & mask) << shift;
-}
-
-static inline void vgic_reg_setbits(unsigned long *reg, register_t bits,
- unsigned int offset,
- enum dabt_size size)
-{
- unsigned long mask = VGIC_REG_MASK(size);
- int shift = offset * 8;
-
- *reg |= ((unsigned long)bits & mask) << shift;
-}
-
-static inline void vgic_reg_clearbits(unsigned long *reg, register_t bits,
- unsigned int offset,
- enum dabt_size size)
-{
- unsigned long mask = VGIC_REG_MASK(size);
- int shift = offset * 8;
-
- *reg &= ~(((unsigned long)bits & mask) << shift);
-}
-
-/* N-bit register helpers */
-#define VGIC_REG_HELPERS(sz, offmask) \
-static inline register_t vgic_reg##sz##_extract(uint##sz##_t reg, \
- const mmio_info_t *info)\
-{ \
- return vgic_reg_extract(reg, info->gpa & offmask, \
- info->dabt.size); \
-} \
- \
-static inline void vgic_reg##sz##_update(uint##sz##_t *reg, \
- register_t val, \
- const mmio_info_t *info) \
-{ \
- unsigned long tmp = *reg; \
- \
- vgic_reg_update(&tmp, val, info->gpa & offmask, \
- info->dabt.size); \
- \
- *reg = tmp; \
-} \
- \
-static inline void vgic_reg##sz##_setbits(uint##sz##_t *reg, \
- register_t bits, \
- const mmio_info_t *info) \
-{ \
- unsigned long tmp = *reg; \
- \
- vgic_reg_setbits(&tmp, bits, info->gpa & offmask, \
- info->dabt.size); \
- \
- *reg = tmp; \
-} \
- \
-static inline void vgic_reg##sz##_clearbits(uint##sz##_t *reg, \
- register_t bits, \
- const mmio_info_t *info) \
-{ \
- unsigned long tmp = *reg; \
- \
- vgic_reg_clearbits(&tmp, bits, info->gpa & offmask, \
- info->dabt.size); \
- \
- *reg = tmp; \
-}
-
/*
* 64 bits registers are only supported on platform with 64-bit long.
* This is also allow us to optimize the 32 bit case by using
diff --git a/xen/include/asm-arm/vreg.h b/xen/include/asm-arm/vreg.h
index ed2bd6f..1442c58 100644
--- a/xen/include/asm-arm/vreg.h
+++ b/xen/include/asm-arm/vreg.h
@@ -107,4 +107,102 @@ static inline bool vreg_emulate_sysreg64(struct cpu_user_regs *regs, union hsr h
#endif
+#define VGIC_REG_MASK(size) ((~0UL) >> (BITS_PER_LONG - ((1 << (size)) * 8)))
+
+/*
+ * The check on the size supported by the register has to be done by
+ * the caller of vgic_regN_*.
+ *
+ * vgic_reg_* should never be called directly. Instead use the vgic_regN_*
+ * according to size of the emulated register
+ *
+ * Note that the alignment fault will always be taken in the guest
+ * (see B3.12.7 DDI0406.b).
+ */
+static inline register_t vgic_reg_extract(unsigned long reg,
+ unsigned int offset,
+ enum dabt_size size)
+{
+ reg >>= 8 * offset;
+ reg &= VGIC_REG_MASK(size);
+
+ return reg;
+}
+
+static inline void vgic_reg_update(unsigned long *reg, register_t val,
+ unsigned int offset,
+ enum dabt_size size)
+{
+ unsigned long mask = VGIC_REG_MASK(size);
+ int shift = offset * 8;
+
+ *reg &= ~(mask << shift);
+ *reg |= ((unsigned long)val & mask) << shift;
+}
+
+static inline void vgic_reg_setbits(unsigned long *reg, register_t bits,
+ unsigned int offset,
+ enum dabt_size size)
+{
+ unsigned long mask = VGIC_REG_MASK(size);
+ int shift = offset * 8;
+
+ *reg |= ((unsigned long)bits & mask) << shift;
+}
+
+static inline void vgic_reg_clearbits(unsigned long *reg, register_t bits,
+ unsigned int offset,
+ enum dabt_size size)
+{
+ unsigned long mask = VGIC_REG_MASK(size);
+ int shift = offset * 8;
+
+ *reg &= ~(((unsigned long)bits & mask) << shift);
+}
+
+/* N-bit register helpers */
+#define VGIC_REG_HELPERS(sz, offmask) \
+static inline register_t vgic_reg##sz##_extract(uint##sz##_t reg, \
+ const mmio_info_t *info)\
+{ \
+ return vgic_reg_extract(reg, info->gpa & offmask, \
+ info->dabt.size); \
+} \
+ \
+static inline void vgic_reg##sz##_update(uint##sz##_t *reg, \
+ register_t val, \
+ const mmio_info_t *info) \
+{ \
+ unsigned long tmp = *reg; \
+ \
+ vgic_reg_update(&tmp, val, info->gpa & offmask, \
+ info->dabt.size); \
+ \
+ *reg = tmp; \
+} \
+ \
+static inline void vgic_reg##sz##_setbits(uint##sz##_t *reg, \
+ register_t bits, \
+ const mmio_info_t *info) \
+{ \
+ unsigned long tmp = *reg; \
+ \
+ vgic_reg_setbits(&tmp, bits, info->gpa & offmask, \
+ info->dabt.size); \
+ \
+ *reg = tmp; \
+} \
+ \
+static inline void vgic_reg##sz##_clearbits(uint##sz##_t *reg, \
+ register_t bits, \
+ const mmio_info_t *info) \
+{ \
+ unsigned long tmp = *reg; \
+ \
+ vgic_reg_clearbits(&tmp, bits, info->gpa & offmask, \
+ info->dabt.size); \
+ \
+ *reg = tmp; \
+}
+
#endif /* __ASM_ARM_VREG__ */
--
2.7.4
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
next reply other threads:[~2017-05-10 14:27 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-10 14:24 Bhupinder Thakur [this message]
2017-05-10 14:24 ` [PATCH 02/12 v3] xen/arm: vpl011: Define generic vreg_reg* access functions in vreg.h Bhupinder Thakur
2017-05-22 12:21 ` Julien Grall
2017-05-23 6:14 ` Bhupinder Thakur
2017-05-10 14:24 ` [PATCH 03/12 v3] xen/arm: vpl011: Add pl011 uart emulation in Xen Bhupinder Thakur
2017-05-16 22:42 ` Stefano Stabellini
2017-05-22 14:24 ` Julien Grall
2017-05-26 13:42 ` Bhupinder Thakur
2017-05-29 7:13 ` Bhupinder Thakur
2017-05-29 18:26 ` Julien Grall
2017-06-01 13:34 ` Bhupinder Thakur
2017-06-01 13:56 ` Julien Grall
2017-06-01 10:33 ` Bhupinder Thakur
2017-06-01 12:42 ` Julien Grall
2017-05-22 12:18 ` [PATCH 01/12 v3] xen/arm: vpl011: Move vgic register access functions to vreg.h Julien Grall
2017-05-22 12:56 ` Bhupinder Thakur
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1494426293-32481-1-git-send-email-bhupinder.thakur@linaro.org \
--to=bhupinder.thakur@linaro.org \
--cc=julien.grall@arm.com \
--cc=sstabellini@kernel.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).