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From: Petre PIRCALABU <ppircalabu@bitdefender.com>
To: "JBeulich@suse.com" <JBeulich@suse.com>
Cc: "tamas@tklengyel.com" <tamas@tklengyel.com>,
	"wei.liu2@citrix.com" <wei.liu2@citrix.com>,
	"rcojocaru@bitdefender.com" <rcojocaru@bitdefender.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"ian.jackson@eu.citrix.com" <ian.jackson@eu.citrix.com>,
	"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Subject: Re: [PATCH 1/2] x86/monitor: add masking support for write_ctrlreg events
Date: Tue, 30 May 2017 09:38:46 +0000	[thread overview]
Message-ID: <1496137126.2320.2.camel@bitdefender.com> (raw)
In-Reply-To: <592C53E1020000780015D560@prv-mh.provo.novell.com>

On Lu, 2017-05-29 at 09:01 -0600, Jan Beulich wrote:
> >
> > >
> > > >
> > > > On 26.05.17 at 15:41, <ppircalabu@bitdefender.com> wrote:
> > --- a/xen/include/public/domctl.h
> > +++ b/xen/include/public/domctl.h
> > @@ -37,7 +37,7 @@
> >  #include "hvm/save.h"
> >  #include "memory.h"
> >
> > -#define XEN_DOMCTL_INTERFACE_VERSION 0x0000000d
> > +#define XEN_DOMCTL_INTERFACE_VERSION 0x0000000e
> >
> >  /*
> >   * NB. xen_domctl.domain is an IN/OUT parameter for this
> > operation.
> > @@ -1107,6 +1107,10 @@ struct xen_domctl_monitor_op {
> >              uint8_t sync;
> >              /* Send event only on a change of value */
> >              uint8_t onchangeonly;
> > +            /* Send event only if the changed bit in the control
> > register
> > +             * is not masked
> > +             */
> > +            unsigned long bitmask;
> You can't use "unsigned long" in public headers. Also beware of
> alignment issues between 32-bit and 64-bit callers (I didn't check
> whether there actually is any, I'm merely hinting towards the
> use of uint64_aligned_t).
>
I will change it to uint64_aligned_t and resubmit the patch.
> >
> > --- a/xen/include/public/vm_event.h
> > +++ b/xen/include/public/vm_event.h
> > @@ -155,6 +155,15 @@
> >  #define VM_EVENT_X86_CR4    2
> >  #define VM_EVENT_X86_XCR0   3
> >
> > +/* vm_event_write_ctrlreg default bit mask
> > + * If the changed bit in the control register is masked the event
> > is
> > + * not triggered
> > + */
> Comment style.
>
> >
> > +#define VM_EVENT_X86_CR0_DEFAULT_MASK        0x00000000
> > +#define VM_EVENT_X86_CR3_DEFAULT_MASK        0x00000000
> > +#define VM_EVENT_X86_CR4_DEFAULT_MASK        0x00000080
> > +#define VM_EVENT_X86_XCR0_DEFAULT_MASK        0x00000000
> These are unused - what are they good for? And why would
> you want to special case CR4.PGE (and even without any
> comment)?
>
> Jan
>
The defaults were added because when the introspection engine requests
CR4 events it will get too many as CR4.PGE is used for global TLB
flushes. However, every client can set-up it's own event masking policy
so these macros are not needed globally.
>
> ________________________
> This email was scanned by Bitdefender

Many thanks for your comments,
Petre

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  reply	other threads:[~2017-05-30  9:38 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-26 13:41 write_ctrlreg event masking Petre Pircalabu
2017-05-26 13:41 ` [PATCH 1/2] x86/monitor: add masking support for write_ctrlreg events Petre Pircalabu
2017-05-29 15:01   ` Jan Beulich
2017-05-30  9:38     ` Petre PIRCALABU [this message]
2017-05-26 13:41 ` [PATCH 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-05-30  9:46 ` write_ctrlreg event masking Petre Pircalabu
2017-05-30  9:46   ` [PATCH v2 1/2] x86/monitor: add masking support for write_ctrlreg events Petre Pircalabu
2017-06-16 14:26     ` Tamas K Lengyel
2017-06-16 15:15       ` Jan Beulich
2017-06-16 15:28         ` Tamas K Lengyel
2017-06-16 15:33           ` Jan Beulich
2017-06-16 16:24             ` Tamas K Lengyel
2017-05-30  9:46   ` [PATCH v2 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-06-16 14:32     ` Tamas K Lengyel
2017-06-16 15:12       ` Jan Beulich
2017-06-16 15:24         ` Tamas K Lengyel
2017-06-16 14:09   ` write_ctrlreg event masking Petre Ovidiu PIRCALABU
2017-06-16 19:20   ` [PATCH v3 0/2] " Petre Pircalabu
2017-06-16 19:20     ` [PATCH v3 1/2] x86/monitor: add masking support for write_ctrlreg events Petre Pircalabu
2017-06-16 19:20     ` [PATCH v3 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-06-16 19:45       ` Razvan Cojocaru
2017-06-19 12:24   ` [PATCH v4 0/2] write_ctrlreg event masking Petre Pircalabu
2017-06-19 12:24     ` [PATCH v4 1/2] x86/monitor: add masking support for write_ctrlreg events Petre Pircalabu
2017-06-20 12:42       ` Wei Liu
2017-06-21 13:58       ` Wei Liu
2017-06-21 14:11         ` Tamas K Lengyel
2017-06-21 14:13         ` Razvan Cojocaru
2017-06-21 14:19           ` Wei Liu
2017-06-19 12:24     ` [PATCH v4 2/2] xen-access: write_ctrlreg_c4 test Petre Pircalabu
2017-06-19 14:51       ` Tamas K Lengyel

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