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From: Lan Tianyu <tianyu.lan@intel.com>
To: xen-devel@lists.xen.org
Cc: Lan Tianyu <tianyu.lan@intel.com>,
	kevin.tian@intel.com, wei.liu2@citrix.com,
	andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com,
	jbeulich@suse.com, chao.gao@intel.com
Subject: [PATCH 5/25] Xen/doc: Add Xen virtual IOMMU doc
Date: Thu, 29 Jun 2017 01:50:37 -0400	[thread overview]
Message-ID: <1498715457-16565-6-git-send-email-tianyu.lan@intel.com> (raw)
In-Reply-To: <1498715457-16565-1-git-send-email-tianyu.lan@intel.com>

This patch is to add Xen virtual IOMMU doc to introduce motivation,
framework, vIOMMU hypercall and xl configuration.

Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
---
 docs/misc/viommu.txt | 129 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 129 insertions(+)
 create mode 100644 docs/misc/viommu.txt

diff --git a/docs/misc/viommu.txt b/docs/misc/viommu.txt
new file mode 100644
index 0000000..76d4cee
--- /dev/null
+++ b/docs/misc/viommu.txt
@@ -0,0 +1,129 @@
+Xen virtual IOMMU
+
+Motivation
+==========
+*) Enable more than 255 vcpu support
+HPC cloud service requires VM provides high performance parallel
+computing and we hope to create a huge VM with >255 vcpu on one machine
+to meet such requirement. Pin each vcpu to separate pcpus.
+
+To support >255 vcpus, X2APIC mode in guest is necessary because legacy
+APIC(XAPIC) just supports 8-bit APIC ID and it only can support 255
+vcpus at most. X2APIC mode supports 32-bit APIC ID and it requires
+interrupt mapping function of vIOMMU.
+
+The reason for this is that there is no modification to existing PCI MSI
+and IOAPIC with the introduction of X2APIC. PCI MSI/IOAPIC can only send
+interrupt message containing 8-bit APIC ID, which cannot address >255
+cpus. Interrupt remapping supports 32-bit APIC ID and so it's necessary
+to enable >255 cpus with x2apic mode.
+
+
+vIOMMU Architecture
+===================
+vIOMMU device model is inside Xen hypervisor for following factors
+    1) Avoid round trips between Qemu and Xen hypervisor
+    2) Ease of integration with the rest of hypervisor
+    3) HVMlite/PVH doesn't use Qemu
+
+* Interrupt remapping overview.
+Interrupts from virtual devices and physical devices are delivered
+to vLAPIC from vIOAPIC and vMSI. vIOMMU needs to remap interrupt during
+this procedure.
+
++---------------------------------------------------+
+|Qemu                       |VM                     |
+|                           | +----------------+    |
+|                           | |  Device driver |    |
+|                           | +--------+-------+    |
+|                           |          ^            |
+|       +----------------+  | +--------+-------+    |
+|       | Virtual device |  | |  IRQ subsystem |    |
+|       +-------+--------+  | +--------+-------+    |
+|               |           |          ^            |
+|               |           |          |            |
++---------------------------+-----------------------+
+|hyperviosr     |                      | VIRQ       |
+|               |            +---------+--------+   |
+|               |            |      vLAPIC      |   |
+|               |VIRQ        +---------+--------+   |
+|               |                      ^            |
+|               |                      |            |
+|               |            +---------+--------+   |
+|               |            |      vIOMMU      |   |
+|               |            +---------+--------+   |
+|               |                      ^            |
+|               |                      |            |
+|               |            +---------+--------+   |
+|               |            |   vIOAPIC/vMSI   |   |
+|               |            +----+----+--------+   |
+|               |                 ^    ^            |
+|               +-----------------+    |            |
+|                                      |            |
++---------------------------------------------------+
+HW                                     |IRQ
+                                +-------------------+
+                                |   PCI Device      |
+                                +-------------------+
+
+
+vIOMMU hypercall
+================
+Introduce new domctl hypercall "xen_domctl_viommu_op" to create/destroy
+vIOMMU and query vIOMMU capabilities that device model can support.
+
+* vIOMMU hypercall parameter structure
+struct xen_domctl_viommu_op {
+    uint32_t cmd;
+#define XEN_DOMCTL_create_viommu          0
+#define XEN_DOMCTL_destroy_viommu         1
+#define XEN_DOMCTL_query_viommu_caps      2
+    union {
+        struct {
+            /* IN - vIOMMU type */
+            uint64_t viommu_type;
+            /* IN - MMIO base address of vIOMMU. */
+            uint64_t base_address;
+            /* IN - Length of MMIO region */
+            uint64_t length;
+            /* IN - Capabilities with which we want to create */
+            uint64_t capabilities;
+            /* OUT - vIOMMU identity */
+            uint32_t viommu_id;
+        } create_viommu;
+
+        struct {
+            /* IN - vIOMMU identity */
+            uint32_t viommu_id;
+        } destroy_viommu;
+
+        struct {
+            /* IN - vIOMMU type */
+            uint64_t viommu_type;
+            /* OUT - vIOMMU Capabilities */
+            uint64_t caps;
+        } query_caps;
+    } u;
+};
+
+- XEN_DOMCTL_query_viommu_caps
+    Query capabilities of vIOMMU device model. vIOMMU_type specifies
+which vendor vIOMMU device model(E,G Intel VTD) is targeted and hypervisor
+returns capability bits(E,G interrupt remapping bit).
+
+- XEN_DOMCTL_create_viommu
+    Create vIOMMU device with vIOMMU_type, capabilities, MMIO
+base address and length. Hypervisor returns viommu_id. Capabilities should
+be in range of value returned by query_viommu_caps hypercall.
+
+- XEN_DOMCTL_destroy_viommu
+    Destroy vIOMMU in Xen hypervisor with viommu_id as parameters.
+
+xl vIOMMU configuration
+=======================
+viommu="type=vtd,intremap=1,x2apic=1"
+
+"type" - Specify vIOMMU device model type. Currently only supports Intel vtd
+device model.
+"intremap" - Enable vIOMMU interrupt remapping function.
+"x2apic" - Support x2apic mode with interrupt remapping function.
-- 
1.8.3.1


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  parent reply	other threads:[~2017-06-29  5:50 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-29  5:50 [PATCH 00/25] xen/vIOMMU: Add vIOMMU support with irq remapping fucntion of virtual vtd Lan Tianyu
2017-06-29  5:50 ` [PATCH 1/25] VIOMMU: Add vIOMMU helper functions to create, destroy and query capabilities Lan Tianyu
2017-06-30 13:05   ` Wei Liu
2017-07-04  1:46     ` Lan Tianyu
2017-07-04  7:34       ` Julien Grall
2017-07-04  7:53         ` Lan Tianyu
2017-07-04  7:57         ` Jan Beulich
2017-07-04 10:16           ` Julien Grall
2017-07-04 10:18             ` Julien Grall
2017-07-04  7:55       ` Jan Beulich
2017-07-04  8:45         ` Lan Tianyu
2017-07-04 10:03           ` Jan Beulich
2017-06-29  5:50 ` [PATCH 2/25] DOMCTL: Introduce new DOMCTL commands for vIOMMU support Lan Tianyu
2017-06-30 13:07   ` Wei Liu
2017-06-29  5:50 ` [PATCH 3/25] VIOMMU: Add irq request callback to deal with irq remapping Lan Tianyu
2017-06-29  5:50 ` [PATCH 4/25] VIOMMU: Add get irq info callback to convert irq remapping request Lan Tianyu
2017-06-29  5:50 ` Lan Tianyu [this message]
2017-07-04 10:39   ` [PATCH 5/25] Xen/doc: Add Xen virtual IOMMU doc Julien Grall
2017-07-05  3:15     ` Lan Tianyu
2017-07-05 13:25       ` Julien Grall
2017-07-06  3:10         ` Lan Tianyu
2017-07-07 16:08           ` Julien Grall
2017-07-12  3:09             ` Lan Tianyu
2017-07-12  7:26               ` Julien Grall
2017-07-12 11:44                 ` Lan Tianyu
2017-07-06  6:20         ` Lan Tianyu
2017-07-07 16:16           ` Julien Grall
2017-07-12  5:34             ` Lan Tianyu
2017-06-29  5:50 ` [PATCH 6/25] Tools/libxc: Add viommu operations in libxc Lan Tianyu
2017-06-30 13:44   ` Wei Liu
2017-06-29  5:50 ` [PATCH 7/25] Tools/libacpi: Add DMA remapping reporting (DMAR) ACPI table structures Lan Tianyu
2017-06-29  5:50 ` [PATCH 8/25] Tools/libacpi: Add new fields in acpi_config to build DMAR table Lan Tianyu
2017-06-29  5:50 ` [PATCH 9/25] Tools/libacpi: Add a user configurable parameter to control vIOMMU attributes Lan Tianyu
2017-06-30 13:44   ` Wei Liu
2017-06-29  5:50 ` [PATCH 10/25] libxl: create vIOMMU during domain construction Lan Tianyu
2017-06-30 13:45   ` Wei Liu
2017-07-04 10:46   ` Julien Grall
2017-07-04 11:03     ` Wei Liu
2017-07-05 10:53       ` Lan Tianyu
2017-07-05 11:19         ` Wei Liu
2017-07-05 11:32           ` Lan Tianyu
2017-07-05 11:39             ` Wei Liu
2017-06-29  5:50 ` [PATCH 11/25] x86/hvm: Introduce a emulated VTD for HVM Lan Tianyu
2017-06-29  5:50 ` [PATCH 12/25] X86/vvtd: Add MMIO handler for VVTD Lan Tianyu
2017-06-30 13:46   ` Wei Liu
2017-06-29  5:50 ` [PATCH 13/25] X86/vvtd: Set Interrupt Remapping Table Pointer through GCMD Lan Tianyu
2017-06-29  5:50 ` [PATCH 14/25] X86/vvtd: Process interrupt remapping request Lan Tianyu
2017-06-29  5:50 ` [PATCH 15/25] x86/vvtd: decode interrupt attribute from IRTE Lan Tianyu
2017-06-29  5:50 ` [PATCH 16/25] x86/vioapic: Hook interrupt delivery of vIOAPIC Lan Tianyu
2017-06-29  5:50 ` [PATCH 17/25] X86/vvtd: Enable Queued Invalidation through GCMD Lan Tianyu
2017-06-29  5:50 ` [PATCH 18/25] X86/vvtd: Enable Interrupt Remapping " Lan Tianyu
2017-06-29  5:50 ` [PATCH 19/25] x86/vioapic: introduce a function to get vector from pin Lan Tianyu
2017-06-29  5:50 ` [PATCH 20/25] passthrough: move some fields of hvm_gmsi_info to a sub-structure Lan Tianyu
2017-06-29  5:50 ` [PATCH 21/25] Tools/libxc: Add a new interface to bind remapping format msi with pirq Lan Tianyu
2017-06-30 13:48   ` Wei Liu
2017-06-29  5:50 ` [PATCH 22/25] x86/vmsi: Hook delivering remapping format msi to guest Lan Tianyu
2017-06-29  5:50 ` [PATCH 23/25] x86/vvtd: Handle interrupt translation faults Lan Tianyu
2017-06-29  5:50 ` [PATCH 24/25] x86/vvtd: Add queued invalidation (QI) support Lan Tianyu
2017-06-29  5:50 ` [PATCH 25/25] x86/vvtd: save and restore emulated VT-d Lan Tianyu

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