From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
ian.jackson@eu.citrix.com, Yi Sun <yi.y.sun@linux.intel.com>,
mengxu@cis.upenn.edu, jbeulich@suse.com,
chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: [PATCH v13 17/23] x86: L2 CAT: implement get hw info flow.
Date: Thu, 6 Jul 2017 09:53:10 +0800 [thread overview]
Message-ID: <1499305996-19029-18-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1499305996-19029-1-git-send-email-yi.y.sun@linux.intel.com>
This patch implements L2 CAT get HW info flow and interface in sysctl.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
v10:
- modify macro name according to previous patch change.
(suggested by Jan Beulich)
- modify commit message.
v9:
- reuse 'cat_get_feat_info' for L2 CAT to reduce redundant codes.
(suggested by Roger Pau)
- modify sysctl implementation of L2 CAT to input data[3] to use
'cat_get_feat_info'.
(suggested by Roger Pau)
- modify macros names to newly defined ones.
(suggested by Jan Beulich)
- remove 'l2_info' to reuse 'l3_info'.
(suggested by Jan Beulich)
- modify macro name according to previous patch change.
(suggested by Jan Beulich)
v5:
- rename 'dat[]' to 'data[]'
(suggested by Jan Beulich)
- remove type check in callback function.
(suggested by Jan Beulich)
v4:
- create this patch because of codes architecture change.
(suggested by Jan Beulich)
---
xen/arch/x86/psr.c | 5 +++++
xen/arch/x86/sysctl.c | 23 +++++++++++++++++++++--
xen/include/public/sysctl.h | 1 +
3 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 81c9454..610a55c 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -240,6 +240,10 @@ static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
feat_type = FEAT_TYPE_L3_CDP;
break;
+ case PSR_CBM_TYPE_L2:
+ feat_type = FEAT_TYPE_L2_CAT;
+ break;
+
default:
ASSERT_UNREACHABLE();
}
@@ -407,6 +411,7 @@ static const struct feat_props l2_cat_props = {
.cos_num = 1,
.type[0] = PSR_CBM_TYPE_L2,
.alt_type = PSR_CBM_TYPE_UNKNOWN,
+ .get_feat_info = cat_get_feat_info,
};
static void __init parse_psr_bool(char *s, char *value, char *feature,
diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
index c23270d..5e91755 100644
--- a/xen/arch/x86/sysctl.c
+++ b/xen/arch/x86/sysctl.c
@@ -174,10 +174,10 @@ long arch_do_sysctl(
case XEN_SYSCTL_psr_cat_op:
switch ( sysctl->u.psr_cat_op.cmd )
{
- case XEN_SYSCTL_PSR_CAT_get_l3_info:
- {
uint32_t data[PSR_INFO_ARRAY_SIZE];
+ case XEN_SYSCTL_PSR_CAT_get_l3_info:
+ {
ret = psr_get_info(sysctl->u.psr_cat_op.target,
PSR_CBM_TYPE_L3, data, ARRAY_SIZE(data));
if ( ret )
@@ -195,6 +195,25 @@ long arch_do_sysctl(
break;
}
+ case XEN_SYSCTL_PSR_CAT_get_l2_info:
+ {
+ ret = psr_get_info(sysctl->u.psr_cat_op.target,
+ PSR_CBM_TYPE_L2, data, ARRAY_SIZE(data));
+ if ( ret )
+ break;
+
+ sysctl->u.psr_cat_op.u.l3_info.cos_max =
+ data[PSR_INFO_IDX_COS_MAX];
+ sysctl->u.psr_cat_op.u.l3_info.cbm_len =
+ data[PSR_INFO_IDX_CAT_CBM_LEN];
+ sysctl->u.psr_cat_op.u.l3_info.flags =
+ data[PSR_INFO_IDX_CAT_FLAG];
+
+ if ( !ret && __copy_field_to_guest(u_sysctl, sysctl, u.psr_cat_op) )
+ ret = -EFAULT;
+ break;
+ }
+
default:
ret = -EOPNOTSUPP;
break;
diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h
index ee76a66..4c76d3a 100644
--- a/xen/include/public/sysctl.h
+++ b/xen/include/public/sysctl.h
@@ -744,6 +744,7 @@ typedef struct xen_sysctl_pcitopoinfo xen_sysctl_pcitopoinfo_t;
DEFINE_XEN_GUEST_HANDLE(xen_sysctl_pcitopoinfo_t);
#define XEN_SYSCTL_PSR_CAT_get_l3_info 0
+#define XEN_SYSCTL_PSR_CAT_get_l2_info 1
struct xen_sysctl_psr_cat_op {
uint32_t cmd; /* IN: XEN_SYSCTL_PSR_CAT_* */
uint32_t target; /* IN */
--
1.9.1
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next prev parent reply other threads:[~2017-07-06 2:07 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-06 1:52 [PATCH v13 00/23] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-07-06 1:52 ` [PATCH v13 01/23] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-07-07 16:37 ` Meng Xu
2017-07-10 5:25 ` Yi Sun
2017-07-10 13:09 ` Meng Xu
2017-07-06 1:52 ` [PATCH v13 02/23] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-07-06 1:52 ` [PATCH v13 03/23] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-07-06 1:52 ` [PATCH v13 04/23] x86: refactor psr: L3 CAT: implement main data structures, CPU init and free flows Yi Sun
2017-07-06 1:52 ` [PATCH v13 05/23] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-07-06 1:52 ` [PATCH v13 06/23] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 07/23] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 08/23] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-07-12 19:14 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 09/23] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-07-12 19:26 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 10/23] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 11/23] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 12/23] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-07-12 19:37 ` Jan Beulich
2017-07-13 2:59 ` Yi Sun
2017-07-13 5:20 ` Jan Beulich
2017-07-13 7:32 ` Yi Sun
2017-07-13 19:21 ` Jan Beulich
2017-07-14 1:38 ` Yi Sun
2017-07-06 1:53 ` [PATCH v13 13/23] x86: refactor psr: CDP: implement CPU init flow Yi Sun
2017-07-12 19:52 ` Jan Beulich
2017-07-13 3:02 ` Yi Sun
2017-07-13 5:24 ` Jan Beulich
2017-07-13 5:28 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 14/23] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 15/23] x86: refactor psr: CDP: implement set value callback function Yi Sun
2017-07-12 20:01 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 16/23] x86: L2 CAT: implement CPU init flow Yi Sun
2017-07-12 20:09 ` Jan Beulich
2017-07-13 3:03 ` Yi Sun
2017-07-06 1:53 ` Yi Sun [this message]
2017-07-06 1:53 ` [PATCH v13 18/23] x86: L2 CAT: implement get value flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 19/23] x86: L2 CAT: implement set " Yi Sun
2017-07-06 1:53 ` [PATCH v13 20/23] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-07-06 1:53 ` [PATCH v13 21/23] tools: L2 CAT: support show cbm " Yi Sun
2017-07-06 1:53 ` [PATCH v13 22/23] tools: L2 CAT: support set " Yi Sun
2017-07-06 1:53 ` [PATCH v13 23/23] docs: add L2 CAT description in docs Yi Sun
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