From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
He Chen <he.chen@linux.intel.com>,
ian.jackson@eu.citrix.com, Yi Sun <yi.y.sun@linux.intel.com>,
mengxu@cis.upenn.edu, jbeulich@suse.com,
chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: [PATCH v13 23/23] docs: add L2 CAT description in docs.
Date: Thu, 6 Jul 2017 09:53:16 +0800 [thread overview]
Message-ID: <1499305996-19029-24-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1499305996-19029-1-git-send-email-yi.y.sun@linux.intel.com>
This patch adds L2 CAT description in related documents.
Signed-off-by: He Chen <he.chen@linux.intel.com>
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
---
v13:
- rebase the patch on latest code.
---
docs/man/xl.pod.1.in | 27 +++++++++++++++++++++++----
docs/misc/xl-psr.markdown | 18 ++++++++++++------
2 files changed, 35 insertions(+), 10 deletions(-)
diff --git a/docs/man/xl.pod.1.in b/docs/man/xl.pod.1.in
index d87fe16..16c8306 100644
--- a/docs/man/xl.pod.1.in
+++ b/docs/man/xl.pod.1.in
@@ -1712,6 +1712,9 @@ occupancy monitoring share the same set of underlying monitoring service. Once
a domain is attached to the monitoring service, monitoring data can be shown
for any of these monitoring types.
+There is no cache monitoring and memory bandwidth monitoring on L2 cache so
+far.
+
=over 4
=item B<psr-cmt-attach> I<domain-id>
@@ -1736,7 +1739,7 @@ monitor types are:
Intel Broadwell and later server platforms offer capabilities to configure and
make use of the Cache Allocation Technology (CAT) mechanisms, which enable more
-cache resources (i.e. L3 cache) to be made available for high priority
+cache resources (i.e. L3/L2 cache) to be made available for high priority
applications. In the Xen implementation, CAT is used to control cache allocation
on VM basis. To enforce cache on a specific domain, just set capacity bitmasks
(CBM) for the domain.
@@ -1746,11 +1749,11 @@ Intel Broadwell and later server platforms also offer Code/Data Prioritization
applications. CDP is used on a per VM basis in the Xen implementation. To
specify code or data CBM for the domain, CDP feature must be enabled and CBM
type options need to be specified when setting CBM, and the type options (code
-and data) are mutually exclusive.
+and data) are mutually exclusive. There is no CDP support on L2 so far.
=over 4
-=item B<psr-cat-cbm-set> [I<OPTIONS>] I<domain-id> I<cbm>
+=item B<psr-cat-set> [I<OPTIONS>] I<domain-id> I<cbm>
Set cache capacity bitmasks(CBM) for a domain. For how to specify I<cbm>
please refer to L<http://xenbits.xen.org/docs/unstable/misc/xl-psr.html>.
@@ -1763,6 +1766,11 @@ B<OPTIONS>
Specify the socket to process, otherwise all sockets are processed.
+=item B<-l LEVEL>, B<--level=LEVEL>
+
+Specify the cache level to process, otherwise the last level cache (L3) is
+processed.
+
=item B<-c>, B<--code>
Set code CBM when CDP is enabled.
@@ -1773,10 +1781,21 @@ Set data CBM when CDP is enabled.
=back
-=item B<psr-cat-show> [I<domain-id>]
+=item B<psr-cat-show> [I<OPTIONS>] [I<domain-id>]
Show CAT settings for a certain domain or all domains.
+B<OPTIONS>
+
+=over 4
+
+=item B<-l LEVEL>, B<--level=LEVEL>
+
+Specify the cache level to process, otherwise the last level cache (L3) is
+processed.
+
+=back
+
=back
=head1 IGNORED FOR COMPATIBILITY WITH XM
diff --git a/docs/misc/xl-psr.markdown b/docs/misc/xl-psr.markdown
index c3c1e8e..04dd957 100644
--- a/docs/misc/xl-psr.markdown
+++ b/docs/misc/xl-psr.markdown
@@ -70,7 +70,7 @@ total-mem-bandwidth instead of cache-occupancy). E.g. after a `xl psr-cmt-attach
Cache Allocation Technology (CAT) is a new feature available on Intel
Broadwell and later server platforms that allows an OS or Hypervisor/VMM to
-partition cache allocation (i.e. L3 cache) based on application priority or
+partition cache allocation (i.e. L3/L2 cache) based on application priority or
Class of Service (COS). Each COS is configured using capacity bitmasks (CBM)
which represent cache capacity and indicate the degree of overlap and
isolation between classes. System cache resource is divided into numbers of
@@ -107,7 +107,7 @@ System CAT information such as maximum COS and CBM length can be obtained by:
The simplest way to change a domain's CBM from its default is running:
-`xl psr-cat-cbm-set [OPTIONS] <domid> <cbm>`
+`xl psr-cat-set [OPTIONS] <domid> <cbm>`
where cbm is a number to represent the corresponding cache subset can be used.
A cbm is valid only when:
@@ -119,13 +119,19 @@ A cbm is valid only when:
In a multi-socket system, the same cbm will be set on each socket by default.
Per socket cbm can be specified with the `--socket SOCKET` option.
+In different systems, the different cache level is supported, e.g. L3 cache or
+L2 cache. Per cache level cbm can be specified with the `--level LEVEL` option.
+
Setting the CBM may not be successful if insufficient COS is available. In
such case unused COS(es) may be freed by setting CBM of all related domains to
its default value(all-ones).
Per domain CBM settings can be shown by:
-`xl psr-cat-show`
+`xl psr-cat-show [OPTIONS] <domid>`
+
+In different systems, the different cache level is supported, e.g. L3 cache or
+L2 cache. Per cache level cbm can be specified with the `--level LEVEL` option.
## Code and Data Prioritization (CDP)
@@ -172,13 +178,13 @@ options is invalid.
Example:
Setting code CBM for a domain:
-`xl psr-cat-cbm-set -c <domid> <cbm>`
+`xl psr-cat-set -c <domid> <cbm>`
Setting data CBM for a domain:
-`xl psr-cat-cbm-set -d <domid> <cbm>`
+`xl psr-cat-set -d <domid> <cbm>`
Setting the same code and data CBM for a domain:
-`xl psr-cat-cbm-set <domid> <cbm>`
+`xl psr-cat-set <domid> <cbm>`
## Reference
--
1.9.1
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prev parent reply other threads:[~2017-07-06 2:07 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-06 1:52 [PATCH v13 00/23] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-07-06 1:52 ` [PATCH v13 01/23] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-07-07 16:37 ` Meng Xu
2017-07-10 5:25 ` Yi Sun
2017-07-10 13:09 ` Meng Xu
2017-07-06 1:52 ` [PATCH v13 02/23] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-07-06 1:52 ` [PATCH v13 03/23] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-07-06 1:52 ` [PATCH v13 04/23] x86: refactor psr: L3 CAT: implement main data structures, CPU init and free flows Yi Sun
2017-07-06 1:52 ` [PATCH v13 05/23] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-07-06 1:52 ` [PATCH v13 06/23] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 07/23] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 08/23] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-07-12 19:14 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 09/23] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-07-12 19:26 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 10/23] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 11/23] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 12/23] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-07-12 19:37 ` Jan Beulich
2017-07-13 2:59 ` Yi Sun
2017-07-13 5:20 ` Jan Beulich
2017-07-13 7:32 ` Yi Sun
2017-07-13 19:21 ` Jan Beulich
2017-07-14 1:38 ` Yi Sun
2017-07-06 1:53 ` [PATCH v13 13/23] x86: refactor psr: CDP: implement CPU init flow Yi Sun
2017-07-12 19:52 ` Jan Beulich
2017-07-13 3:02 ` Yi Sun
2017-07-13 5:24 ` Jan Beulich
2017-07-13 5:28 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 14/23] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 15/23] x86: refactor psr: CDP: implement set value callback function Yi Sun
2017-07-12 20:01 ` Jan Beulich
2017-07-06 1:53 ` [PATCH v13 16/23] x86: L2 CAT: implement CPU init flow Yi Sun
2017-07-12 20:09 ` Jan Beulich
2017-07-13 3:03 ` Yi Sun
2017-07-06 1:53 ` [PATCH v13 17/23] x86: L2 CAT: implement get hw info flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 18/23] x86: L2 CAT: implement get value flow Yi Sun
2017-07-06 1:53 ` [PATCH v13 19/23] x86: L2 CAT: implement set " Yi Sun
2017-07-06 1:53 ` [PATCH v13 20/23] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-07-06 1:53 ` [PATCH v13 21/23] tools: L2 CAT: support show cbm " Yi Sun
2017-07-06 1:53 ` [PATCH v13 22/23] tools: L2 CAT: support set " Yi Sun
2017-07-06 1:53 ` Yi Sun [this message]
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