From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
ian.jackson@eu.citrix.com, Yi Sun <yi.y.sun@linux.intel.com>,
julien.grall@arm.com, mengxu@cis.upenn.edu, jbeulich@suse.com,
chao.p.peng@linux.intel.com, roger.pau@citrix.com
Subject: [PATCH v2 15/15] docs: add MBA description in docs
Date: Thu, 24 Aug 2017 09:14:49 +0800 [thread overview]
Message-ID: <1503537289-56036-16-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1503537289-56036-1-git-send-email-yi.y.sun@linux.intel.com>
This patch adds MBA description in related documents.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
---
v2:
- state the value type shown by 'psr-mba-show'. For linear mode,
it shows decimal value. For non-linear mode, it shows hexadecimal
value.
(suggested by Chao Peng)
---
docs/man/xl.pod.1.in | 34 +++++++++++++++++++++++++
docs/misc/xl-psr.markdown | 63 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 97 insertions(+)
diff --git a/docs/man/xl.pod.1.in b/docs/man/xl.pod.1.in
index 16c8306..e644b19 100644
--- a/docs/man/xl.pod.1.in
+++ b/docs/man/xl.pod.1.in
@@ -1798,6 +1798,40 @@ processed.
=back
+=head2 Memory Bandwidth Allocation
+
+Intel Skylake and later server platforms offer capabilities to configure and
+make use of the Memory Bandwidth Allocation (MBA) mechanisms, which provides
+OS/VMMs the ability to slow misbehaving apps/VMs or create advanced closed-loop
+control system via exposing control over a credit-based throttling mechanism.
+In the Xen implementation, MBA is used to control memory bandwidth on VM basis.
+To enforce bandwidth on a specific domain, just set throttling value (THRTL)
+for the domain.
+
+=over 4
+
+=item B<psr-mba-set> [I<OPTIONS>] I<domain-id> I<thrtl>
+
+Set throttling value (THRTL) for a domain. For how to specify I<thrtl>
+please refer to L<http://xenbits.xen.org/docs/unstable/misc/xl-psr.html>.
+
+B<OPTIONS>
+
+=over 4
+
+=item B<-s SOCKET>, B<--socket=SOCKET>
+
+Specify the socket to process, otherwise all sockets are processed.
+
+=back
+
+=item B<psr-mba-show> [I<domain-id>]
+
+Show MBA settings for a certain domain or all domains. For linear mode, it
+shows the decimal value. For non-linear mode, it shows hexadecimal value.
+
+=back
+
=head1 IGNORED FOR COMPATIBILITY WITH XM
xl is mostly command-line compatible with the old xm utility used with
diff --git a/docs/misc/xl-psr.markdown b/docs/misc/xl-psr.markdown
index 04dd957..39fc801 100644
--- a/docs/misc/xl-psr.markdown
+++ b/docs/misc/xl-psr.markdown
@@ -186,6 +186,69 @@ Setting data CBM for a domain:
Setting the same code and data CBM for a domain:
`xl psr-cat-set <domid> <cbm>`
+## Memory Bandwidth Allocation (MBA)
+
+Memory Bandwidth Allocation (MBA) is a new feature available on Intel
+Skylake and later server platforms that allows an OS or Hypervisor/VMM to
+slow misbehaving apps/VMs or create advanced closed-loop control system via
+exposing control over a credit-based throttling mechanism. To enforce bandwidth
+on a specific domain, just set throttling value (THRTL) into Class of Service
+(COS). MBA provides two THRTL mode. One is linear mode and the other is
+non-linear mode.
+
+In the linear mode the input precision is defined as 100-(THRTL_MAX). Values
+not an even multiple of the precision (e.g., 12%) will be rounded down (e.g.,
+to 10% delay applied).
+
+If linear values are not supported then input delay values are powers-of-two
+from zero to the THRTL_MAX value from CPUID. In this case any values not a power
+of two will be rounded down the next nearest power of two.
+
+For example, assuming a system with 2 domains:
+
+ * A THRTL of 0x0 for every domain means each domain can access the whole cache
+ without any delay. This is the default.
+
+ * Linear mode: Giving one domain a THRTL of 0xC and the other domain's 0 means
+ that the first domain gets 10% delay to access the cache and the other one
+ without any delay.
+
+ * Non-linear mode: Giving one domain a THRTL of 0xC and the other domain's 0
+ means that the first domain gets 8% delay to access the cache and the other
+ one without any delay.
+
+For more detailed information please refer to Intel SDM chapter
+"Introduction to Memory Bandwidth Allocation".
+
+In Xen's implementation, THRTL can be configured with libxl/xl interfaces but
+COS is maintained in hypervisor only. The cache partition granularity is per
+domain, each domain has COS=0 assigned by default, the corresponding THRTL is
+0, which means all the cache resource can be accessed without delay.
+
+### xl interfaces
+
+System MBA information such as maximum COS and maximum THRTL can be obtained by:
+
+`xl psr-hwinfo --mba`
+
+The simplest way to change a domain's THRTL from its default is running:
+
+`xl psr-mba-set [OPTIONS] <domid> <thrtl>`
+
+In a multi-socket system, the same thrtl will be set on each socket by default.
+Per socket thrtl can be specified with the `--socket SOCKET` option.
+
+Setting the THRTL may not be successful if insufficient COS is available. In
+such case unused COS(es) may be freed by setting THRTL of all related domains to
+its default value(0).
+
+Per domain THRTL settings can be shown by:
+
+`xl psr-mba-show [OPTIONS] <domid>`
+
+For linear mode, it shows the decimal value. For non-linear mode, it shows
+hexadecimal value.
+
## Reference
[1] Intel SDM
--
1.9.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
prev parent reply other threads:[~2017-08-24 1:32 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-24 1:14 [PATCH v2 00/15] Enable Memory Bandwidth Allocation in Xen Yi Sun
2017-08-24 1:14 ` [PATCH v2 01/15] docs: create Memory Bandwidth Allocation (MBA) feature document Yi Sun
2017-08-29 11:46 ` Roger Pau Monné
2017-08-30 5:20 ` Yi Sun
2017-08-30 7:42 ` Roger Pau Monn�
2017-08-24 1:14 ` [PATCH v2 02/15] Rename PSR sysctl/domctl interfaces and xsm policy to make them be general Yi Sun
2017-08-29 12:00 ` Roger Pau Monné
2017-08-30 5:23 ` Yi Sun
2017-08-30 7:47 ` Roger Pau Monn�
2017-08-30 8:14 ` Yi Sun
2017-08-24 1:14 ` [PATCH v2 03/15] x86: rename 'cbm_type' to 'psr_val_type' to make it general Yi Sun
2017-08-29 12:15 ` Roger Pau Monné
2017-08-30 5:47 ` Yi Sun
2017-08-30 7:51 ` Roger Pau Monn�
2017-08-30 8:14 ` Yi Sun
2017-08-24 1:14 ` [PATCH v2 04/15] x86: implement data structure and CPU init flow for MBA Yi Sun
2017-08-29 13:44 ` Roger Pau Monné
2017-08-29 13:58 ` Jan Beulich
2017-08-30 6:07 ` Yi Sun
2017-08-30 5:31 ` Yi Sun
2017-08-30 7:55 ` Roger Pau Monn�
2017-08-30 8:19 ` Yi Sun
2017-08-30 8:45 ` Jan Beulich
2017-08-24 1:14 ` [PATCH v2 05/15] x86: implement get hw info " Yi Sun
2017-08-29 15:01 ` Roger Pau Monné
2017-08-30 5:33 ` Yi Sun
2017-08-24 1:14 ` [PATCH v2 06/15] x86: implement get value interface " Yi Sun
2017-08-29 15:04 ` Roger Pau Monné
2017-08-24 1:14 ` [PATCH v2 07/15] x86: implement set value flow " Yi Sun
2017-08-30 8:31 ` Roger Pau Monné
2017-08-31 2:20 ` Yi Sun
2017-08-31 8:30 ` Roger Pau Monn�
2017-08-31 9:13 ` Yi Sun
2017-08-31 9:30 ` Roger Pau Monn�
2017-08-31 10:10 ` Yi Sun
2017-08-31 10:19 ` Roger Pau Monn�
2017-08-24 1:14 ` [PATCH v2 08/15] tools: create general interfaces to support psr allocation features Yi Sun
2017-08-30 8:42 ` Roger Pau Monné
2017-08-31 2:38 ` Yi Sun
2017-08-31 8:37 ` Roger Pau Monn�
2017-09-04 2:09 ` Yi Sun
2017-09-04 8:43 ` Wei Liu
2017-08-24 1:14 ` [PATCH v2 09/15] tools: implement the new libxc get hw info interface Yi Sun
2017-08-30 8:58 ` Roger Pau Monné
2017-08-31 3:05 ` Yi Sun
2017-08-24 1:14 ` [PATCH v2 10/15] tools: implement the new libxl " Yi Sun
2017-08-30 9:15 ` Roger Pau Monné
2017-08-31 3:16 ` Yi Sun
2017-08-31 8:40 ` Roger Pau Monn�
2017-08-31 9:19 ` Yi Sun
2017-08-31 9:32 ` Roger Pau Monn�
2017-08-31 10:11 ` Yi Sun
2017-08-24 1:14 ` [PATCH v2 11/15] tools: implement the new xl " Yi Sun
2017-08-30 9:23 ` Roger Pau Monné
2017-08-31 5:57 ` Yi Sun
2017-08-31 8:43 ` Roger Pau Monn�
2017-08-31 9:24 ` Yi Sun
2017-08-24 1:14 ` [PATCH v2 12/15] tools: rename 'xc_psr_cat_type' to 'xc_psr_val_type' Yi Sun
2017-08-30 9:24 ` Roger Pau Monné
2017-08-24 1:14 ` [PATCH v2 13/15] tools: implement new generic get value interface and MBA get value command Yi Sun
2017-08-24 1:14 ` [PATCH v2 14/15] tools: implement new generic set value interface and MBA set " Yi Sun
2017-08-30 9:47 ` Roger Pau Monné
2017-08-31 5:58 ` Yi Sun
2017-08-24 1:14 ` Yi Sun [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1503537289-56036-16-git-send-email-yi.y.sun@linux.intel.com \
--to=yi.y.sun@linux.intel.com \
--cc=andrew.cooper3@citrix.com \
--cc=chao.p.peng@linux.intel.com \
--cc=dario.faggioli@citrix.com \
--cc=ian.jackson@eu.citrix.com \
--cc=jbeulich@suse.com \
--cc=julien.grall@arm.com \
--cc=kevin.tian@intel.com \
--cc=mengxu@cis.upenn.edu \
--cc=roger.pau@citrix.com \
--cc=wei.liu2@citrix.com \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).