* [PATCH RFC] x86/emul: Fix the handling of unimplemented Grp7 instructions
@ 2017-09-04 17:21 Andrew Cooper
2017-09-04 17:34 ` [PATCH RFC v2] " Andrew Cooper
2017-09-05 8:41 ` [PATCH v3] " Andrew Cooper
0 siblings, 2 replies; 10+ messages in thread
From: Andrew Cooper @ 2017-09-04 17:21 UTC (permalink / raw)
To: Xen-devel; +Cc: Petre Pircalabu, Andrew Cooper, Jan Beulich
Grp7 is abnormally complicated to decode, even by x86's standards, with
{s,l}msw being the problematic cases.
Previously, any value which fell through the first switch statement (looking
for instructions with entirely implicit operands) would be interpreted by the
second switch statement (handling instructions with memory operands).
Unimplemented instructions would then hit the #UD case for having a non-memory
operand, rather than taking the cannot_emulate path.
Place a big if/else around the two switch statements (accounting for {s,l}msw
which need handling in the else clause), so both switch statments can have a
default goto cannot_emulate path.
Reported-by: Petre Pircalabu <ppircalabu@bitdefender.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Petre Pircalabu <ppircalabu@bitdefender.com>
RFC as I've only done light testing so far.
---
xen/arch/x86/x86_emulate/x86_emulate.c | 353 +++++++++++++++++----------------
1 file changed, 184 insertions(+), 169 deletions(-)
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 2201852..af3d8da 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -4987,197 +4987,212 @@ x86_emulate(
}
break;
- case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */ {
- unsigned long base, limit, cr0, cr0w;
+ case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */
+ {
+ unsigned long base, limit;
- switch( modrm )
+ if ( (modrm & 0xc0) == 0xc0 &&
+ (modrm_reg & 7) != 4 /* smsw */ &&
+ (modrm_reg & 7) != 6 /* lmsw */ )
{
- case 0xca: /* clac */
- case 0xcb: /* stac */
- vcpu_must_have(smap);
- generate_exception_if(vex.pfx || !mode_ring0(), EXC_UD);
-
- _regs.eflags &= ~X86_EFLAGS_AC;
- if ( modrm == 0xcb )
- _regs.eflags |= X86_EFLAGS_AC;
- goto complete_insn;
+ switch ( modrm )
+ {
+ case 0xca: /* clac */
+ case 0xcb: /* stac */
+ vcpu_must_have(smap);
+ generate_exception_if(vex.pfx || !mode_ring0(), EXC_UD);
+
+ _regs.eflags &= ~X86_EFLAGS_AC;
+ if ( modrm == 0xcb )
+ _regs.eflags |= X86_EFLAGS_AC;
+ goto complete_insn;
#ifdef __XEN__
- case 0xd1: /* xsetbv */
- generate_exception_if(vex.pfx, EXC_UD);
- if ( !ops->read_cr || ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY )
- cr4 = 0;
- generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD);
- generate_exception_if(!mode_ring0() ||
- handle_xsetbv(_regs.ecx,
- _regs.eax | (_regs.rdx << 32)),
- EXC_GP, 0);
- goto complete_insn;
+ case 0xd1: /* xsetbv */
+ generate_exception_if(vex.pfx, EXC_UD);
+ if ( !ops->read_cr ||
+ ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY )
+ cr4 = 0;
+ generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD);
+ generate_exception_if(!mode_ring0() ||
+ handle_xsetbv(_regs.ecx, _regs.eax |
+ (_regs.rdx << 32)),
+ EXC_GP, 0);
+ goto complete_insn;
#endif
- case 0xd4: /* vmfunc */
- generate_exception_if(vex.pfx, EXC_UD);
- fail_if(!ops->vmfunc);
- if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY )
- goto done;
- goto complete_insn;
-
- case 0xd5: /* xend */
- generate_exception_if(vex.pfx, EXC_UD);
- generate_exception_if(!vcpu_has_rtm(), EXC_UD);
- generate_exception_if(vcpu_has_rtm(), EXC_GP, 0);
- break;
-
- case 0xd6: /* xtest */
- generate_exception_if(vex.pfx, EXC_UD);
- generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(),
- EXC_UD);
- /* Neither HLE nor RTM can be active when we get here. */
- _regs.eflags |= X86_EFLAGS_ZF;
- goto complete_insn;
+ case 0xd4: /* vmfunc */
+ generate_exception_if(vex.pfx, EXC_UD);
+ fail_if(!ops->vmfunc);
+ if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY )
+ goto done;
+ goto complete_insn;
- case 0xdf: /* invlpga */
- generate_exception_if(!in_protmode(ctxt, ops), EXC_UD);
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- fail_if(ops->invlpg == NULL);
- if ( (rc = ops->invlpg(x86_seg_none, truncate_ea(_regs.r(ax)),
- ctxt)) )
- goto done;
- goto complete_insn;
+ case 0xd5: /* xend */
+ generate_exception_if(vex.pfx, EXC_UD);
+ generate_exception_if(!vcpu_has_rtm(), EXC_UD);
+ generate_exception_if(vcpu_has_rtm(), EXC_GP, 0);
+ break;
- case 0xf9: /* rdtscp */
- fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr(MSR_TSC_AUX,
- &msr_val, ctxt)) != X86EMUL_OKAY )
- goto done;
- _regs.r(cx) = (uint32_t)msr_val;
- goto rdtsc;
+ case 0xd6: /* xtest */
+ generate_exception_if(vex.pfx, EXC_UD);
+ generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(),
+ EXC_UD);
+ /* Neither HLE nor RTM can be active when we get here. */
+ _regs.eflags |= X86_EFLAGS_ZF;
+ goto complete_insn;
- case 0xfc: /* clzero */
- {
- unsigned long zero = 0;
+ case 0xdf: /* invlpga */
+ generate_exception_if(!in_protmode(ctxt, ops), EXC_UD);
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ fail_if(ops->invlpg == NULL);
+ if ( (rc = ops->invlpg(x86_seg_none, truncate_ea(_regs.r(ax)),
+ ctxt)) )
+ goto done;
+ goto complete_insn;
- vcpu_must_have(clzero);
+ case 0xf9: /* rdtscp */
+ fail_if(ops->read_msr == NULL);
+ if ( (rc = ops->read_msr(MSR_TSC_AUX,
+ &msr_val, ctxt)) != X86EMUL_OKAY )
+ goto done;
+ _regs.r(cx) = (uint32_t)msr_val;
+ goto rdtsc;
- base = ad_bytes == 8 ? _regs.r(ax) :
- ad_bytes == 4 ? _regs.eax : _regs.ax;
- limit = 0;
- if ( vcpu_has_clflush() &&
- ops->cpuid(1, 0, &cpuid_leaf, ctxt) == X86EMUL_OKAY )
- limit = ((cpuid_leaf.b >> 8) & 0xff) * 8;
- generate_exception_if(limit < sizeof(long) ||
- (limit & (limit - 1)), EXC_UD);
- base &= ~(limit - 1);
- if ( ops->rep_stos )
+ case 0xfc: /* clzero */
{
- unsigned long nr_reps = limit / sizeof(zero);
+ unsigned long zero = 0;
+
+ vcpu_must_have(clzero);
+
+ base = ad_bytes == 8 ? _regs.r(ax) :
+ ad_bytes == 4 ? _regs.eax : _regs.ax;
+ limit = 0;
+ if ( vcpu_has_clflush() &&
+ ops->cpuid(1, 0, &cpuid_leaf, ctxt) == X86EMUL_OKAY )
+ limit = ((cpuid_leaf.b >> 8) & 0xff) * 8;
+ generate_exception_if(limit < sizeof(long) ||
+ (limit & (limit - 1)), EXC_UD);
+ base &= ~(limit - 1);
+ if ( ops->rep_stos )
+ {
+ unsigned long nr_reps = limit / sizeof(zero);
- rc = ops->rep_stos(&zero, ea.mem.seg, base, sizeof(zero),
- &nr_reps, ctxt);
- if ( rc == X86EMUL_OKAY )
+ rc = ops->rep_stos(&zero, ea.mem.seg, base, sizeof(zero),
+ &nr_reps, ctxt);
+ if ( rc == X86EMUL_OKAY )
+ {
+ base += nr_reps * sizeof(zero);
+ limit -= nr_reps * sizeof(zero);
+ }
+ else if ( rc != X86EMUL_UNHANDLEABLE )
+ goto done;
+ }
+ fail_if(limit && !ops->write);
+ while ( limit )
{
- base += nr_reps * sizeof(zero);
- limit -= nr_reps * sizeof(zero);
+ rc = ops->write(ea.mem.seg, base, &zero,
+ sizeof(zero), ctxt);
+ if ( rc != X86EMUL_OKAY )
+ goto done;
+ base += sizeof(zero);
+ limit -= sizeof(zero);
}
- else if ( rc != X86EMUL_UNHANDLEABLE )
- goto done;
+ goto complete_insn;
}
- fail_if(limit && !ops->write);
- while ( limit )
- {
- rc = ops->write(ea.mem.seg, base, &zero, sizeof(zero), ctxt);
- if ( rc != X86EMUL_OKAY )
- goto done;
- base += sizeof(zero);
- limit -= sizeof(zero);
+
+ default:
+ goto cannot_emulate;
}
- goto complete_insn;
- }
}
+ else
+ {
+ unsigned long cr0, cr0w;
- seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
+ seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
- switch ( modrm_reg & 7 )
- {
- case 0: /* sgdt */
- case 1: /* sidt */
- generate_exception_if(ea.type != OP_MEM, EXC_UD);
- generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
- fail_if(!ops->read_segment || !ops->write);
- if ( (rc = ops->read_segment(seg, &sreg, ctxt)) )
- goto done;
- if ( mode_64bit() )
- op_bytes = 8;
- else if ( op_bytes == 2 )
- {
- sreg.base &= 0xffffff;
- op_bytes = 4;
- }
- if ( (rc = ops->write(ea.mem.seg, ea.mem.off, &sreg.limit,
- 2, ctxt)) != X86EMUL_OKAY ||
- (rc = ops->write(ea.mem.seg, ea.mem.off + 2, &sreg.base,
- op_bytes, ctxt)) != X86EMUL_OKAY )
- goto done;
- break;
- case 2: /* lgdt */
- case 3: /* lidt */
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- generate_exception_if(ea.type != OP_MEM, EXC_UD);
- fail_if(ops->write_segment == NULL);
- memset(&sreg, 0, sizeof(sreg));
- if ( (rc = read_ulong(ea.mem.seg, ea.mem.off+0,
- &limit, 2, ctxt, ops)) ||
- (rc = read_ulong(ea.mem.seg, ea.mem.off+2,
- &base, mode_64bit() ? 8 : 4, ctxt, ops)) )
- goto done;
- generate_exception_if(!is_canonical_address(base), EXC_GP, 0);
- sreg.base = base;
- sreg.limit = limit;
- if ( !mode_64bit() && op_bytes == 2 )
- sreg.base &= 0xffffff;
- if ( (rc = ops->write_segment(seg, &sreg, ctxt)) )
- goto done;
- break;
- case 4: /* smsw */
- generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
- if ( ea.type == OP_MEM )
+ switch ( modrm_reg & 7 )
{
- fail_if(!ops->write);
- d |= Mov; /* force writeback */
- ea.bytes = 2;
+ case 0: /* sgdt */
+ case 1: /* sidt */
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
+ generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
+ fail_if(!ops->read_segment || !ops->write);
+ if ( (rc = ops->read_segment(seg, &sreg, ctxt)) )
+ goto done;
+ if ( mode_64bit() )
+ op_bytes = 8;
+ else if ( op_bytes == 2 )
+ {
+ sreg.base &= 0xffffff;
+ op_bytes = 4;
+ }
+ if ( (rc = ops->write(ea.mem.seg, ea.mem.off, &sreg.limit,
+ 2, ctxt)) != X86EMUL_OKAY ||
+ (rc = ops->write(ea.mem.seg, ea.mem.off + 2, &sreg.base,
+ op_bytes, ctxt)) != X86EMUL_OKAY )
+ goto done;
+ break;
+ case 2: /* lgdt */
+ case 3: /* lidt */
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
+ fail_if(ops->write_segment == NULL);
+ memset(&sreg, 0, sizeof(sreg));
+ if ( (rc = read_ulong(ea.mem.seg, ea.mem.off+0,
+ &limit, 2, ctxt, ops)) ||
+ (rc = read_ulong(ea.mem.seg, ea.mem.off+2,
+ &base, mode_64bit() ? 8 : 4, ctxt, ops)) )
+ goto done;
+ generate_exception_if(!is_canonical_address(base), EXC_GP, 0);
+ sreg.base = base;
+ sreg.limit = limit;
+ if ( !mode_64bit() && op_bytes == 2 )
+ sreg.base &= 0xffffff;
+ if ( (rc = ops->write_segment(seg, &sreg, ctxt)) )
+ goto done;
+ break;
+ case 4: /* smsw */
+ generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
+ if ( ea.type == OP_MEM )
+ {
+ fail_if(!ops->write);
+ d |= Mov; /* force writeback */
+ ea.bytes = 2;
+ }
+ else
+ ea.bytes = op_bytes;
+ dst = ea;
+ fail_if(ops->read_cr == NULL);
+ if ( (rc = ops->read_cr(0, &dst.val, ctxt)) )
+ goto done;
+ break;
+ case 6: /* lmsw */
+ fail_if(ops->read_cr == NULL);
+ fail_if(ops->write_cr == NULL);
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ if ( (rc = ops->read_cr(0, &cr0, ctxt)) )
+ goto done;
+ if ( ea.type == OP_REG )
+ cr0w = *ea.reg;
+ else if ( (rc = read_ulong(ea.mem.seg, ea.mem.off,
+ &cr0w, 2, ctxt, ops)) )
+ goto done;
+ /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */
+ cr0 = (cr0 & ~0xe) | (cr0w & 0xf);
+ if ( (rc = ops->write_cr(0, cr0, ctxt)) )
+ goto done;
+ break;
+ case 7: /* invlpg */
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
+ fail_if(ops->invlpg == NULL);
+ if ( (rc = ops->invlpg(ea.mem.seg, ea.mem.off, ctxt)) )
+ goto done;
+ break;
+ default:
+ goto cannot_emulate;
}
- else
- ea.bytes = op_bytes;
- dst = ea;
- fail_if(ops->read_cr == NULL);
- if ( (rc = ops->read_cr(0, &dst.val, ctxt)) )
- goto done;
- break;
- case 6: /* lmsw */
- fail_if(ops->read_cr == NULL);
- fail_if(ops->write_cr == NULL);
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- if ( (rc = ops->read_cr(0, &cr0, ctxt)) )
- goto done;
- if ( ea.type == OP_REG )
- cr0w = *ea.reg;
- else if ( (rc = read_ulong(ea.mem.seg, ea.mem.off,
- &cr0w, 2, ctxt, ops)) )
- goto done;
- /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */
- cr0 = (cr0 & ~0xe) | (cr0w & 0xf);
- if ( (rc = ops->write_cr(0, cr0, ctxt)) )
- goto done;
- break;
- case 7: /* invlpg */
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- generate_exception_if(ea.type != OP_MEM, EXC_UD);
- fail_if(ops->invlpg == NULL);
- if ( (rc = ops->invlpg(ea.mem.seg, ea.mem.off, ctxt)) )
- goto done;
- break;
- default:
- goto cannot_emulate;
}
break;
}
--
2.1.4
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH RFC v2] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-04 17:21 [PATCH RFC] x86/emul: Fix the handling of unimplemented Grp7 instructions Andrew Cooper
@ 2017-09-04 17:34 ` Andrew Cooper
2017-09-05 6:57 ` Jan Beulich
2017-09-05 8:41 ` [PATCH v3] " Andrew Cooper
1 sibling, 1 reply; 10+ messages in thread
From: Andrew Cooper @ 2017-09-04 17:34 UTC (permalink / raw)
To: Xen-devel; +Cc: Petre Pircalabu, Andrew Cooper, Jan Beulich
Grp7 is abnormally complicated to decode, even by x86's standards, with
{s,l}msw being the problematic cases.
Previously, any value which fell through the first switch statement (looking
for instructions with entirely implicit operands) would be interpreted by the
second switch statement (handling instructions with memory operands).
Unimplemented instructions would then hit the #UD case for having a non-memory
operand, rather than taking the cannot_emulate path.
Place a big if/else around the two switch statements (accounting for {s,l}msw
which need handling in the else clause), so both switch statments can have a
default goto cannot_emulate path.
This fixes the emulation of xend, which would hit the #UD path when it should
complete with no side effects.
Reported-by: Petre Pircalabu <ppircalabu@bitdefender.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Petre Pircalabu <ppircalabu@bitdefender.com>
v2:
* Use break rather than goto complete_insn for implicit instructions.
* Note that we actually fix the behaviour of xend.
RFC as I've only done light testing so far.
---
xen/arch/x86/x86_emulate/x86_emulate.c | 356 +++++++++++++++++----------------
1 file changed, 188 insertions(+), 168 deletions(-)
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 2201852..27c7ead 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -4987,197 +4987,217 @@ x86_emulate(
}
break;
- case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */ {
- unsigned long base, limit, cr0, cr0w;
+ case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */
+ {
+ unsigned long base, limit;
- switch( modrm )
+ if ( (modrm & 0xc0) == 0xc0 &&
+ (modrm_reg & 7) != 4 /* smsw */ &&
+ (modrm_reg & 7) != 6 /* lmsw */ )
{
- case 0xca: /* clac */
- case 0xcb: /* stac */
- vcpu_must_have(smap);
- generate_exception_if(vex.pfx || !mode_ring0(), EXC_UD);
-
- _regs.eflags &= ~X86_EFLAGS_AC;
- if ( modrm == 0xcb )
- _regs.eflags |= X86_EFLAGS_AC;
- goto complete_insn;
+ switch ( modrm )
+ {
+ case 0xca: /* clac */
+ case 0xcb: /* stac */
+ vcpu_must_have(smap);
+ generate_exception_if(vex.pfx || !mode_ring0(), EXC_UD);
+
+ _regs.eflags &= ~X86_EFLAGS_AC;
+ if ( modrm == 0xcb )
+ _regs.eflags |= X86_EFLAGS_AC;
+ break;
#ifdef __XEN__
- case 0xd1: /* xsetbv */
- generate_exception_if(vex.pfx, EXC_UD);
- if ( !ops->read_cr || ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY )
- cr4 = 0;
- generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD);
- generate_exception_if(!mode_ring0() ||
- handle_xsetbv(_regs.ecx,
- _regs.eax | (_regs.rdx << 32)),
- EXC_GP, 0);
- goto complete_insn;
+ case 0xd1: /* xsetbv */
+ generate_exception_if(vex.pfx, EXC_UD);
+ if ( !ops->read_cr ||
+ ops->read_cr(4, &cr4, ctxt) != X86EMUL_OKAY )
+ cr4 = 0;
+ generate_exception_if(!(cr4 & X86_CR4_OSXSAVE), EXC_UD);
+ generate_exception_if(!mode_ring0() ||
+ handle_xsetbv(_regs.ecx, _regs.eax |
+ (_regs.rdx << 32)),
+ EXC_GP, 0);
+ break;
#endif
- case 0xd4: /* vmfunc */
- generate_exception_if(vex.pfx, EXC_UD);
- fail_if(!ops->vmfunc);
- if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY )
- goto done;
- goto complete_insn;
+ case 0xd4: /* vmfunc */
+ generate_exception_if(vex.pfx, EXC_UD);
+ fail_if(!ops->vmfunc);
+ if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY )
+ goto done;
+ break;
- case 0xd5: /* xend */
- generate_exception_if(vex.pfx, EXC_UD);
- generate_exception_if(!vcpu_has_rtm(), EXC_UD);
- generate_exception_if(vcpu_has_rtm(), EXC_GP, 0);
- break;
+ case 0xd5: /* xend */
+ generate_exception_if(vex.pfx, EXC_UD);
+ generate_exception_if(!vcpu_has_rtm(), EXC_UD);
+ generate_exception_if(vcpu_has_rtm(), EXC_GP, 0);
+ break;
- case 0xd6: /* xtest */
- generate_exception_if(vex.pfx, EXC_UD);
- generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(),
- EXC_UD);
- /* Neither HLE nor RTM can be active when we get here. */
- _regs.eflags |= X86_EFLAGS_ZF;
- goto complete_insn;
+ case 0xd6: /* xtest */
+ generate_exception_if(vex.pfx, EXC_UD);
+ generate_exception_if(!vcpu_has_rtm() && !vcpu_has_hle(),
+ EXC_UD);
+ /* Neither HLE nor RTM can be active when we get here. */
+ _regs.eflags |= X86_EFLAGS_ZF;
+ break;
- case 0xdf: /* invlpga */
- generate_exception_if(!in_protmode(ctxt, ops), EXC_UD);
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- fail_if(ops->invlpg == NULL);
- if ( (rc = ops->invlpg(x86_seg_none, truncate_ea(_regs.r(ax)),
- ctxt)) )
- goto done;
- goto complete_insn;
+ case 0xdf: /* invlpga */
+ generate_exception_if(!in_protmode(ctxt, ops), EXC_UD);
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ fail_if(ops->invlpg == NULL);
+ if ( (rc = ops->invlpg(x86_seg_none, truncate_ea(_regs.r(ax)),
+ ctxt)) )
+ goto done;
+ break;
- case 0xf9: /* rdtscp */
- fail_if(ops->read_msr == NULL);
- if ( (rc = ops->read_msr(MSR_TSC_AUX,
- &msr_val, ctxt)) != X86EMUL_OKAY )
- goto done;
- _regs.r(cx) = (uint32_t)msr_val;
- goto rdtsc;
+ case 0xf9: /* rdtscp */
+ fail_if(ops->read_msr == NULL);
+ if ( (rc = ops->read_msr(MSR_TSC_AUX,
+ &msr_val, ctxt)) != X86EMUL_OKAY )
+ goto done;
+ _regs.r(cx) = (uint32_t)msr_val;
+ goto rdtsc;
+
+ case 0xfc: /* clzero */
+ {
+ unsigned long zero = 0;
+
+ vcpu_must_have(clzero);
+
+ base = ad_bytes == 8 ? _regs.r(ax) :
+ ad_bytes == 4 ? _regs.eax : _regs.ax;
+ limit = 0;
+ if ( vcpu_has_clflush() &&
+ ops->cpuid(1, 0, &cpuid_leaf, ctxt) == X86EMUL_OKAY )
+ limit = ((cpuid_leaf.b >> 8) & 0xff) * 8;
+ generate_exception_if(limit < sizeof(long) ||
+ (limit & (limit - 1)), EXC_UD);
+ base &= ~(limit - 1);
+ if ( ops->rep_stos )
+ {
+ unsigned long nr_reps = limit / sizeof(zero);
+
+ rc = ops->rep_stos(&zero, ea.mem.seg, base, sizeof(zero),
+ &nr_reps, ctxt);
+ if ( rc == X86EMUL_OKAY )
+ {
+ base += nr_reps * sizeof(zero);
+ limit -= nr_reps * sizeof(zero);
+ }
+ else if ( rc != X86EMUL_UNHANDLEABLE )
+ goto done;
+ }
+ fail_if(limit && !ops->write);
+ while ( limit )
+ {
+ rc = ops->write(ea.mem.seg, base, &zero,
+ sizeof(zero), ctxt);
+ if ( rc != X86EMUL_OKAY )
+ goto done;
+ base += sizeof(zero);
+ limit -= sizeof(zero);
+ }
+ break;
+ }
- case 0xfc: /* clzero */
+ default:
+ goto cannot_emulate;
+ }
+ }
+ else
{
- unsigned long zero = 0;
+ unsigned long cr0, cr0w;
- vcpu_must_have(clzero);
+ seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
- base = ad_bytes == 8 ? _regs.r(ax) :
- ad_bytes == 4 ? _regs.eax : _regs.ax;
- limit = 0;
- if ( vcpu_has_clflush() &&
- ops->cpuid(1, 0, &cpuid_leaf, ctxt) == X86EMUL_OKAY )
- limit = ((cpuid_leaf.b >> 8) & 0xff) * 8;
- generate_exception_if(limit < sizeof(long) ||
- (limit & (limit - 1)), EXC_UD);
- base &= ~(limit - 1);
- if ( ops->rep_stos )
+ switch ( modrm_reg & 7 )
{
- unsigned long nr_reps = limit / sizeof(zero);
+ case 0: /* sgdt */
+ case 1: /* sidt */
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
+ generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
+ fail_if(!ops->read_segment || !ops->write);
+ if ( (rc = ops->read_segment(seg, &sreg, ctxt)) )
+ goto done;
+ if ( mode_64bit() )
+ op_bytes = 8;
+ else if ( op_bytes == 2 )
+ {
+ sreg.base &= 0xffffff;
+ op_bytes = 4;
+ }
+ if ( (rc = ops->write(ea.mem.seg, ea.mem.off, &sreg.limit,
+ 2, ctxt)) != X86EMUL_OKAY ||
+ (rc = ops->write(ea.mem.seg, ea.mem.off + 2, &sreg.base,
+ op_bytes, ctxt)) != X86EMUL_OKAY )
+ goto done;
+ break;
+
+ case 2: /* lgdt */
+ case 3: /* lidt */
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
+ fail_if(ops->write_segment == NULL);
+ memset(&sreg, 0, sizeof(sreg));
+ if ( (rc = read_ulong(ea.mem.seg, ea.mem.off+0,
+ &limit, 2, ctxt, ops)) ||
+ (rc = read_ulong(ea.mem.seg, ea.mem.off+2,
+ &base, mode_64bit() ? 8 : 4, ctxt, ops)) )
+ goto done;
+ generate_exception_if(!is_canonical_address(base), EXC_GP, 0);
+ sreg.base = base;
+ sreg.limit = limit;
+ if ( !mode_64bit() && op_bytes == 2 )
+ sreg.base &= 0xffffff;
+ if ( (rc = ops->write_segment(seg, &sreg, ctxt)) )
+ goto done;
+ break;
- rc = ops->rep_stos(&zero, ea.mem.seg, base, sizeof(zero),
- &nr_reps, ctxt);
- if ( rc == X86EMUL_OKAY )
+ case 4: /* smsw */
+ generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
+ if ( ea.type == OP_MEM )
{
- base += nr_reps * sizeof(zero);
- limit -= nr_reps * sizeof(zero);
+ fail_if(!ops->write);
+ d |= Mov; /* force writeback */
+ ea.bytes = 2;
}
- else if ( rc != X86EMUL_UNHANDLEABLE )
+ else
+ ea.bytes = op_bytes;
+ dst = ea;
+ fail_if(ops->read_cr == NULL);
+ if ( (rc = ops->read_cr(0, &dst.val, ctxt)) )
goto done;
- }
- fail_if(limit && !ops->write);
- while ( limit )
- {
- rc = ops->write(ea.mem.seg, base, &zero, sizeof(zero), ctxt);
- if ( rc != X86EMUL_OKAY )
+ break;
+
+ case 6: /* lmsw */
+ fail_if(ops->read_cr == NULL);
+ fail_if(ops->write_cr == NULL);
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ if ( (rc = ops->read_cr(0, &cr0, ctxt)) )
goto done;
- base += sizeof(zero);
- limit -= sizeof(zero);
- }
- goto complete_insn;
- }
- }
+ if ( ea.type == OP_REG )
+ cr0w = *ea.reg;
+ else if ( (rc = read_ulong(ea.mem.seg, ea.mem.off,
+ &cr0w, 2, ctxt, ops)) )
+ goto done;
+ /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */
+ cr0 = (cr0 & ~0xe) | (cr0w & 0xf);
+ if ( (rc = ops->write_cr(0, cr0, ctxt)) )
+ goto done;
+ break;
- seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
+ case 7: /* invlpg */
+ generate_exception_if(!mode_ring0(), EXC_GP, 0);
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
+ fail_if(ops->invlpg == NULL);
+ if ( (rc = ops->invlpg(ea.mem.seg, ea.mem.off, ctxt)) )
+ goto done;
+ break;
- switch ( modrm_reg & 7 )
- {
- case 0: /* sgdt */
- case 1: /* sidt */
- generate_exception_if(ea.type != OP_MEM, EXC_UD);
- generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
- fail_if(!ops->read_segment || !ops->write);
- if ( (rc = ops->read_segment(seg, &sreg, ctxt)) )
- goto done;
- if ( mode_64bit() )
- op_bytes = 8;
- else if ( op_bytes == 2 )
- {
- sreg.base &= 0xffffff;
- op_bytes = 4;
- }
- if ( (rc = ops->write(ea.mem.seg, ea.mem.off, &sreg.limit,
- 2, ctxt)) != X86EMUL_OKAY ||
- (rc = ops->write(ea.mem.seg, ea.mem.off + 2, &sreg.base,
- op_bytes, ctxt)) != X86EMUL_OKAY )
- goto done;
- break;
- case 2: /* lgdt */
- case 3: /* lidt */
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- generate_exception_if(ea.type != OP_MEM, EXC_UD);
- fail_if(ops->write_segment == NULL);
- memset(&sreg, 0, sizeof(sreg));
- if ( (rc = read_ulong(ea.mem.seg, ea.mem.off+0,
- &limit, 2, ctxt, ops)) ||
- (rc = read_ulong(ea.mem.seg, ea.mem.off+2,
- &base, mode_64bit() ? 8 : 4, ctxt, ops)) )
- goto done;
- generate_exception_if(!is_canonical_address(base), EXC_GP, 0);
- sreg.base = base;
- sreg.limit = limit;
- if ( !mode_64bit() && op_bytes == 2 )
- sreg.base &= 0xffffff;
- if ( (rc = ops->write_segment(seg, &sreg, ctxt)) )
- goto done;
- break;
- case 4: /* smsw */
- generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
- if ( ea.type == OP_MEM )
- {
- fail_if(!ops->write);
- d |= Mov; /* force writeback */
- ea.bytes = 2;
+ default:
+ goto cannot_emulate;
}
- else
- ea.bytes = op_bytes;
- dst = ea;
- fail_if(ops->read_cr == NULL);
- if ( (rc = ops->read_cr(0, &dst.val, ctxt)) )
- goto done;
- break;
- case 6: /* lmsw */
- fail_if(ops->read_cr == NULL);
- fail_if(ops->write_cr == NULL);
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- if ( (rc = ops->read_cr(0, &cr0, ctxt)) )
- goto done;
- if ( ea.type == OP_REG )
- cr0w = *ea.reg;
- else if ( (rc = read_ulong(ea.mem.seg, ea.mem.off,
- &cr0w, 2, ctxt, ops)) )
- goto done;
- /* LMSW can: (1) set bits 0-3; (2) clear bits 1-3. */
- cr0 = (cr0 & ~0xe) | (cr0w & 0xf);
- if ( (rc = ops->write_cr(0, cr0, ctxt)) )
- goto done;
- break;
- case 7: /* invlpg */
- generate_exception_if(!mode_ring0(), EXC_GP, 0);
- generate_exception_if(ea.type != OP_MEM, EXC_UD);
- fail_if(ops->invlpg == NULL);
- if ( (rc = ops->invlpg(ea.mem.seg, ea.mem.off, ctxt)) )
- goto done;
- break;
- default:
- goto cannot_emulate;
}
break;
}
--
2.1.4
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^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH RFC v2] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-04 17:34 ` [PATCH RFC v2] " Andrew Cooper
@ 2017-09-05 6:57 ` Jan Beulich
2017-09-05 7:34 ` Andrew Cooper
0 siblings, 1 reply; 10+ messages in thread
From: Jan Beulich @ 2017-09-05 6:57 UTC (permalink / raw)
To: andrew.cooper3; +Cc: ppircalabu, xen-devel
>>> Andrew Cooper <andrew.cooper3@citrix.com> 09/04/17 7:35 PM >>>
>Grp7 is abnormally complicated to decode, even by x86's standards, with
>{s,l}msw being the problematic cases.
>
>Previously, any value which fell through the first switch statement (looking
>for instructions with entirely implicit operands) would be interpreted by the
>second switch statement (handling instructions with memory operands).
>
>Unimplemented instructions would then hit the #UD case for having a non-memory
>operand, rather than taking the cannot_emulate path.
>
>Place a big if/else around the two switch statements (accounting for {s,l}msw
>which need handling in the else clause), so both switch statments can have a
>default goto cannot_emulate path.
>
>This fixes the emulation of xend, which would hit the #UD path when it should
>complete with no side effects.
This could be had with a single line change. And while I can see this mistake
of mine alone to be justification for the restructuring, it's still rather big a change
due to all the re-indentation. Did you instead consider simply combining the
two switch() statements (retaining present indentation), by using range case
labels for the opcodes permitting operands? That would have the added benefit
of no longer producing #UD for things like VMCALL, but instead having those
go to cannot_emulate too.
>+ if ( (modrm & 0xc0) == 0xc0 &&
>+ (modrm_reg & 7) != 4 /* smsw */ &&
>+ (modrm_reg & 7) != 6 /* lmsw */ )
(modrm & 5) == 4 would be the more compact variant; I'm not sure if all
compilers we support would be able to fold this.
Jan
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH RFC v2] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-05 6:57 ` Jan Beulich
@ 2017-09-05 7:34 ` Andrew Cooper
2017-09-05 9:43 ` Jan Beulich
0 siblings, 1 reply; 10+ messages in thread
From: Andrew Cooper @ 2017-09-05 7:34 UTC (permalink / raw)
To: Jan Beulich; +Cc: ppircalabu, xen-devel
On 05/09/2017 07:57, Jan Beulich wrote:
>>>> Andrew Cooper <andrew.cooper3@citrix.com> 09/04/17 7:35 PM >>>
>> Grp7 is abnormally complicated to decode, even by x86's standards, with
>> {s,l}msw being the problematic cases.
>>
>> Previously, any value which fell through the first switch statement (looking
>> for instructions with entirely implicit operands) would be interpreted by the
>> second switch statement (handling instructions with memory operands).
>>
>> Unimplemented instructions would then hit the #UD case for having a non-memory
>> operand, rather than taking the cannot_emulate path.
>>
>> Place a big if/else around the two switch statements (accounting for {s,l}msw
>> which need handling in the else clause), so both switch statments can have a
>> default goto cannot_emulate path.
>>
>> This fixes the emulation of xend, which would hit the #UD path when it should
>> complete with no side effects.
> This could be had with a single line change. And while I can see this mistake
> of mine alone to be justification for the restructuring, it's still rather big a change
> due to all the re-indentation. Did you instead consider simply combining the
> two switch() statements (retaining present indentation), by using range case
> labels for the opcodes permitting operands?
That was my first idea, but the cases are not adjacent. You need 3
ranges for the mod != 11 instructions, and 4 for {s,l}msw, and there was
no clean way I could find to express that.
> That would have the added benefit
> of no longer producing #UD for things like VMCALL, but instead having those
> go to cannot_emulate too.
This is the behaviour the patch is intended to introduce. What's broken
with the logic?
~Andrew
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH RFC v2] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-05 7:34 ` Andrew Cooper
@ 2017-09-05 9:43 ` Jan Beulich
2017-09-05 9:53 ` Andrew Cooper
0 siblings, 1 reply; 10+ messages in thread
From: Jan Beulich @ 2017-09-05 9:43 UTC (permalink / raw)
To: Andrew Cooper; +Cc: ppircalabu, xen-devel
>>> On 05.09.17 at 09:34, <andrew.cooper3@citrix.com> wrote:
> On 05/09/2017 07:57, Jan Beulich wrote:
>>>>> Andrew Cooper <andrew.cooper3@citrix.com> 09/04/17 7:35 PM >>>
>>> Grp7 is abnormally complicated to decode, even by x86's standards, with
>>> {s,l}msw being the problematic cases.
>>>
>>> Previously, any value which fell through the first switch statement (looking
>>> for instructions with entirely implicit operands) would be interpreted by
> the
>>> second switch statement (handling instructions with memory operands).
>>>
>>> Unimplemented instructions would then hit the #UD case for having a
> non-memory
>>> operand, rather than taking the cannot_emulate path.
>>>
>>> Place a big if/else around the two switch statements (accounting for
> {s,l}msw
>>> which need handling in the else clause), so both switch statments can have a
>>> default goto cannot_emulate path.
>>>
>>> This fixes the emulation of xend, which would hit the #UD path when it
> should
>>> complete with no side effects.
>> This could be had with a single line change. And while I can see this
> mistake
>> of mine alone to be justification for the restructuring, it's still rather
> big a change
>> due to all the re-indentation. Did you instead consider simply combining the
>> two switch() statements (retaining present indentation), by using range case
>> labels for the opcodes permitting operands?
>
> That was my first idea, but the cases are not adjacent. You need 3
> ranges for the mod != 11 instructions, and 4 for {s,l}msw, and there was
> no clean way I could find to express that.
I see you've found one (which is largely what I was going to suggest).
>> That would have the added benefit
>> of no longer producing #UD for things like VMCALL, but instead having those
>> go to cannot_emulate too.
>
> This is the behaviour the patch is intended to introduce. What's broken
> with the logic?
I guess you've realized meanwhile that it was the
generate_exception_if(ea.type != OP_MEM, EXC_UD);
that were left in place, which were causing the sub-optimal
behavior. Speaking of which - do we want to go farther and
convert further similar #UD raising into cannot_emulate (or
with Petre's unimplemented_insn) goto-s?
Jan
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH RFC v2] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-05 9:43 ` Jan Beulich
@ 2017-09-05 9:53 ` Andrew Cooper
2017-09-05 10:07 ` Jan Beulich
0 siblings, 1 reply; 10+ messages in thread
From: Andrew Cooper @ 2017-09-05 9:53 UTC (permalink / raw)
To: Jan Beulich; +Cc: ppircalabu, xen-devel
On 05/09/2017 10:43, Jan Beulich wrote:
>>>> On 05.09.17 at 09:34, <andrew.cooper3@citrix.com> wrote:
>> On 05/09/2017 07:57, Jan Beulich wrote:
>>>>>> Andrew Cooper <andrew.cooper3@citrix.com> 09/04/17 7:35 PM >>>
>>>> Grp7 is abnormally complicated to decode, even by x86's standards, with
>>>> {s,l}msw being the problematic cases.
>>>>
>>>> Previously, any value which fell through the first switch statement (looking
>>>> for instructions with entirely implicit operands) would be interpreted by
>> the
>>>> second switch statement (handling instructions with memory operands).
>>>>
>>>> Unimplemented instructions would then hit the #UD case for having a
>> non-memory
>>>> operand, rather than taking the cannot_emulate path.
>>>>
>>>> Place a big if/else around the two switch statements (accounting for
>> {s,l}msw
>>>> which need handling in the else clause), so both switch statments can have a
>>>> default goto cannot_emulate path.
>>>>
>>>> This fixes the emulation of xend, which would hit the #UD path when it
>> should
>>>> complete with no side effects.
>>> This could be had with a single line change. And while I can see this
>> mistake
>>> of mine alone to be justification for the restructuring, it's still rather
>> big a change
>>> due to all the re-indentation. Did you instead consider simply combining the
>>> two switch() statements (retaining present indentation), by using range case
>>> labels for the opcodes permitting operands?
>> That was my first idea, but the cases are not adjacent. You need 3
>> ranges for the mod != 11 instructions, and 4 for {s,l}msw, and there was
>> no clean way I could find to express that.
> I see you've found one (which is largely what I was going to suggest).
>
>>> That would have the added benefit
>>> of no longer producing #UD for things like VMCALL, but instead having those
>>> go to cannot_emulate too.
>> This is the behaviour the patch is intended to introduce. What's broken
>> with the logic?
> I guess you've realized meanwhile that it was the
>
> generate_exception_if(ea.type != OP_MEM, EXC_UD);
>
> that were left in place, which were causing the sub-optimal
> behavior.
VMCALL is encoded with mod == 11, so now doesn't fall into the sgdt case.
> Speaking of which - do we want to go farther and
> convert further similar #UD raising into cannot_emulate (or
> with Petre's unimplemented_insn) goto-s?
In this specific case, I think the generate_exception_if(ea.type !=
OP_MEM, EXC_UD); can be converted to asserts, because the only way to
violate that condition is with an earlier error calculating ea or modrm.
In the general case, I think we should prefer the cannot_emulate path.
Are there any uses of this label which aren't due to having no
implementation? If so, we probably want to introduce a new label so the
two cases can be distinguished.
~Andrew
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH RFC v2] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-05 9:53 ` Andrew Cooper
@ 2017-09-05 10:07 ` Jan Beulich
0 siblings, 0 replies; 10+ messages in thread
From: Jan Beulich @ 2017-09-05 10:07 UTC (permalink / raw)
To: Andrew Cooper; +Cc: ppircalabu, xen-devel
>>> On 05.09.17 at 11:53, <andrew.cooper3@citrix.com> wrote:
> On 05/09/2017 10:43, Jan Beulich wrote:
>>>>> On 05.09.17 at 09:34, <andrew.cooper3@citrix.com> wrote:
>>> On 05/09/2017 07:57, Jan Beulich wrote:
>>>>>>> Andrew Cooper <andrew.cooper3@citrix.com> 09/04/17 7:35 PM >>>
>>>>> Grp7 is abnormally complicated to decode, even by x86's standards, with
>>>>> {s,l}msw being the problematic cases.
>>>>>
>>>>> Previously, any value which fell through the first switch statement (looking
>>>>> for instructions with entirely implicit operands) would be interpreted by
>>> the
>>>>> second switch statement (handling instructions with memory operands).
>>>>>
>>>>> Unimplemented instructions would then hit the #UD case for having a
>>> non-memory
>>>>> operand, rather than taking the cannot_emulate path.
>>>>>
>>>>> Place a big if/else around the two switch statements (accounting for
>>> {s,l}msw
>>>>> which need handling in the else clause), so both switch statments can have a
>>>>> default goto cannot_emulate path.
>>>>>
>>>>> This fixes the emulation of xend, which would hit the #UD path when it
>>> should
>>>>> complete with no side effects.
>>>> This could be had with a single line change. And while I can see this
>>> mistake
>>>> of mine alone to be justification for the restructuring, it's still rather
>>> big a change
>>>> due to all the re-indentation. Did you instead consider simply combining the
>>>> two switch() statements (retaining present indentation), by using range case
>>>> labels for the opcodes permitting operands?
>>> That was my first idea, but the cases are not adjacent. You need 3
>>> ranges for the mod != 11 instructions, and 4 for {s,l}msw, and there was
>>> no clean way I could find to express that.
>> I see you've found one (which is largely what I was going to suggest).
>>
>>>> That would have the added benefit
>>>> of no longer producing #UD for things like VMCALL, but instead having those
>>>> go to cannot_emulate too.
>>> This is the behaviour the patch is intended to introduce. What's broken
>>> with the logic?
>> I guess you've realized meanwhile that it was the
>>
>> generate_exception_if(ea.type != OP_MEM, EXC_UD);
>>
>> that were left in place, which were causing the sub-optimal
>> behavior.
>
> VMCALL is encoded with mod == 11, so now doesn't fall into the sgdt case.
Oh, right.
>> Speaking of which - do we want to go farther and
>> convert further similar #UD raising into cannot_emulate (or
>> with Petre's unimplemented_insn) goto-s?
>
> In this specific case, I think the generate_exception_if(ea.type !=
> OP_MEM, EXC_UD); can be converted to asserts, because the only way to
> violate that condition is with an earlier error calculating ea or modrm.
Yes, I was about to ask you to do that (in reply to v3).
> In the general case, I think we should prefer the cannot_emulate path.
> Are there any uses of this label which aren't due to having no
> implementation? If so, we probably want to introduce a new label so the
> two cases can be distinguished.
That's what Petre's patch does. But my question was about
questionable uses of generate_exception_if(..., EXC_UD).
Jan
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-04 17:21 [PATCH RFC] x86/emul: Fix the handling of unimplemented Grp7 instructions Andrew Cooper
2017-09-04 17:34 ` [PATCH RFC v2] " Andrew Cooper
@ 2017-09-05 8:41 ` Andrew Cooper
2017-09-05 10:23 ` Jan Beulich
2017-09-05 17:02 ` Petre Ovidiu PIRCALABU
1 sibling, 2 replies; 10+ messages in thread
From: Andrew Cooper @ 2017-09-05 8:41 UTC (permalink / raw)
To: Xen-devel; +Cc: Petre Pircalabu, Andrew Cooper, Jan Beulich
Grp7 is abnormally complicated to decode, even by x86's standards, with
{s,l}msw being the problematic cases.
Previously, any value which fell through the first switch statement (looking
for instructions with entirely implicit operands) would be interpreted by the
second switch statement (handling instructions with memory operands).
Unimplemented instructions would then hit the #UD case for having a non-memory
operand, rather than taking the cannot_emulate path.
Consolidate the two switch statements into a single one, using ranges to cover
the instructions with memory operands.
This also fixes the emulation of xend, which would hit the #UD path when it
should complete with no side effects.
Reported-by: Petre Pircalabu <ppircalabu@bitdefender.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Petre Pircalabu <ppircalabu@bitdefender.com>
v3:
* Use a single switch statement.
v2:
* Use break rather than goto complete_insn for implicit instructions.
* Note that we actually fix the behaviour of xend.
RFC as I've only done light testing so far.
---
xen/arch/x86/x86_emulate/x86_emulate.c | 49 +++++++++++++++++++++-------------
1 file changed, 31 insertions(+), 18 deletions(-)
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 2201852..43e0e00 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -4987,9 +4987,12 @@ x86_emulate(
}
break;
- case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */ {
+ case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */
+ {
unsigned long base, limit, cr0, cr0w;
+ seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
+
switch( modrm )
{
case 0xca: /* clac */
@@ -5000,7 +5003,7 @@ x86_emulate(
_regs.eflags &= ~X86_EFLAGS_AC;
if ( modrm == 0xcb )
_regs.eflags |= X86_EFLAGS_AC;
- goto complete_insn;
+ break;
#ifdef __XEN__
case 0xd1: /* xsetbv */
@@ -5012,7 +5015,7 @@ x86_emulate(
handle_xsetbv(_regs.ecx,
_regs.eax | (_regs.rdx << 32)),
EXC_GP, 0);
- goto complete_insn;
+ break;
#endif
case 0xd4: /* vmfunc */
@@ -5020,7 +5023,7 @@ x86_emulate(
fail_if(!ops->vmfunc);
if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY )
goto done;
- goto complete_insn;
+ break;
case 0xd5: /* xend */
generate_exception_if(vex.pfx, EXC_UD);
@@ -5034,7 +5037,7 @@ x86_emulate(
EXC_UD);
/* Neither HLE nor RTM can be active when we get here. */
_regs.eflags |= X86_EFLAGS_ZF;
- goto complete_insn;
+ break;
case 0xdf: /* invlpga */
generate_exception_if(!in_protmode(ctxt, ops), EXC_UD);
@@ -5043,7 +5046,7 @@ x86_emulate(
if ( (rc = ops->invlpg(x86_seg_none, truncate_ea(_regs.r(ax)),
ctxt)) )
goto done;
- goto complete_insn;
+ break;
case 0xf9: /* rdtscp */
fail_if(ops->read_msr == NULL);
@@ -5091,16 +5094,16 @@ x86_emulate(
base += sizeof(zero);
limit -= sizeof(zero);
}
- goto complete_insn;
- }
+ break;
}
- seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
+#define _GRP7(mod, reg) \
+ (((mod) << 6) | ((reg) << 3)) ... (((mod) << 6) | ((reg) << 3) | 7)
+#define GRP7_MEM(reg) _GRP7(0, reg): case _GRP7(1, reg): case _GRP7(2, reg)
+#define GRP7_ALL(reg) GRP7_MEM(reg): case _GRP7(3, reg)
- switch ( modrm_reg & 7 )
- {
- case 0: /* sgdt */
- case 1: /* sidt */
+ case GRP7_MEM(0): /* sgdt */
+ case GRP7_MEM(1): /* sidt */
generate_exception_if(ea.type != OP_MEM, EXC_UD);
generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
fail_if(!ops->read_segment || !ops->write);
@@ -5119,8 +5122,9 @@ x86_emulate(
op_bytes, ctxt)) != X86EMUL_OKAY )
goto done;
break;
- case 2: /* lgdt */
- case 3: /* lidt */
+
+ case GRP7_MEM(2): /* lgdt */
+ case GRP7_MEM(3): /* lidt */
generate_exception_if(!mode_ring0(), EXC_GP, 0);
generate_exception_if(ea.type != OP_MEM, EXC_UD);
fail_if(ops->write_segment == NULL);
@@ -5138,7 +5142,8 @@ x86_emulate(
if ( (rc = ops->write_segment(seg, &sreg, ctxt)) )
goto done;
break;
- case 4: /* smsw */
+
+ case GRP7_ALL(4): /* smsw */
generate_exception_if(umip_active(ctxt, ops), EXC_GP, 0);
if ( ea.type == OP_MEM )
{
@@ -5153,7 +5158,8 @@ x86_emulate(
if ( (rc = ops->read_cr(0, &dst.val, ctxt)) )
goto done;
break;
- case 6: /* lmsw */
+
+ case GRP7_ALL(6): /* lmsw */
fail_if(ops->read_cr == NULL);
fail_if(ops->write_cr == NULL);
generate_exception_if(!mode_ring0(), EXC_GP, 0);
@@ -5169,16 +5175,23 @@ x86_emulate(
if ( (rc = ops->write_cr(0, cr0, ctxt)) )
goto done;
break;
- case 7: /* invlpg */
+
+ case GRP7_MEM(7): /* invlpg */
generate_exception_if(!mode_ring0(), EXC_GP, 0);
generate_exception_if(ea.type != OP_MEM, EXC_UD);
fail_if(ops->invlpg == NULL);
if ( (rc = ops->invlpg(ea.mem.seg, ea.mem.off, ctxt)) )
goto done;
break;
+
default:
goto cannot_emulate;
}
+
+#undef GRP7_ALL
+#undef GRP7_MEM
+#undef _GRP7
+
break;
}
--
2.1.4
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^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v3] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-05 8:41 ` [PATCH v3] " Andrew Cooper
@ 2017-09-05 10:23 ` Jan Beulich
2017-09-05 17:02 ` Petre Ovidiu PIRCALABU
1 sibling, 0 replies; 10+ messages in thread
From: Jan Beulich @ 2017-09-05 10:23 UTC (permalink / raw)
To: Andrew Cooper; +Cc: Petre Pircalabu, Xen-devel
>>> On 05.09.17 at 10:41, <andrew.cooper3@citrix.com> wrote:
> + case GRP7_MEM(0): /* sgdt */
> + case GRP7_MEM(1): /* sidt */
> generate_exception_if(ea.type != OP_MEM, EXC_UD);
As implied on the v2 thread - with these converted to ASSERT()
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Jan
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] x86/emul: Fix the handling of unimplemented Grp7 instructions
2017-09-05 8:41 ` [PATCH v3] " Andrew Cooper
2017-09-05 10:23 ` Jan Beulich
@ 2017-09-05 17:02 ` Petre Ovidiu PIRCALABU
1 sibling, 0 replies; 10+ messages in thread
From: Petre Ovidiu PIRCALABU @ 2017-09-05 17:02 UTC (permalink / raw)
To: andrew.cooper3@citrix.com, xen-devel@lists.xen.org; +Cc: JBeulich@suse.com
Reviewed-by: Petre Pircalabu <ppircalabu@bitdefender.com>
On Ma, 2017-09-05 at 09:41 +0100, Andrew Cooper wrote:
> Grp7 is abnormally complicated to decode, even by x86's standards,
> with
> {s,l}msw being the problematic cases.
>
> Previously, any value which fell through the first switch statement
> (looking
> for instructions with entirely implicit operands) would be
> interpreted by the
> second switch statement (handling instructions with memory operands).
>
> Unimplemented instructions would then hit the #UD case for having a
> non-memory
> operand, rather than taking the cannot_emulate path.
>
> Consolidate the two switch statements into a single one, using ranges
> to cover
> the instructions with memory operands.
>
> This also fixes the emulation of xend, which would hit the #UD path
> when it
> should complete with no side effects.
>
> Reported-by: Petre Pircalabu <ppircalabu@bitdefender.com>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
> CC: Jan Beulich <JBeulich@suse.com>
> CC: Petre Pircalabu <ppircalabu@bitdefender.com>
>
> v3:
> * Use a single switch statement.
>
> v2:
> * Use break rather than goto complete_insn for implicit
> instructions.
> * Note that we actually fix the behaviour of xend.
>
> RFC as I've only done light testing so far.
> ---
> xen/arch/x86/x86_emulate/x86_emulate.c | 49 +++++++++++++++++++++---
> ----------
> 1 file changed, 31 insertions(+), 18 deletions(-)
>
> diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c
> b/xen/arch/x86/x86_emulate/x86_emulate.c
> index 2201852..43e0e00 100644
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -4987,9 +4987,12 @@ x86_emulate(
> }
> break;
>
> - case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */ {
> + case X86EMUL_OPC(0x0f, 0x01): /* Grp7 */
> + {
> unsigned long base, limit, cr0, cr0w;
>
> + seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
> +
> switch( modrm )
> {
> case 0xca: /* clac */
> @@ -5000,7 +5003,7 @@ x86_emulate(
> _regs.eflags &= ~X86_EFLAGS_AC;
> if ( modrm == 0xcb )
> _regs.eflags |= X86_EFLAGS_AC;
> - goto complete_insn;
> + break;
>
> #ifdef __XEN__
> case 0xd1: /* xsetbv */
> @@ -5012,7 +5015,7 @@ x86_emulate(
> handle_xsetbv(_regs.ecx,
> _regs.eax |
> (_regs.rdx << 32)),
> EXC_GP, 0);
> - goto complete_insn;
> + break;
> #endif
>
> case 0xd4: /* vmfunc */
> @@ -5020,7 +5023,7 @@ x86_emulate(
> fail_if(!ops->vmfunc);
> if ( (rc = ops->vmfunc(ctxt)) != X86EMUL_OKAY )
> goto done;
> - goto complete_insn;
> + break;
>
> case 0xd5: /* xend */
> generate_exception_if(vex.pfx, EXC_UD);
> @@ -5034,7 +5037,7 @@ x86_emulate(
> EXC_UD);
> /* Neither HLE nor RTM can be active when we get here.
> */
> _regs.eflags |= X86_EFLAGS_ZF;
> - goto complete_insn;
> + break;
>
> case 0xdf: /* invlpga */
> generate_exception_if(!in_protmode(ctxt, ops), EXC_UD);
> @@ -5043,7 +5046,7 @@ x86_emulate(
> if ( (rc = ops->invlpg(x86_seg_none,
> truncate_ea(_regs.r(ax)),
> ctxt)) )
> goto done;
> - goto complete_insn;
> + break;
>
> case 0xf9: /* rdtscp */
> fail_if(ops->read_msr == NULL);
> @@ -5091,16 +5094,16 @@ x86_emulate(
> base += sizeof(zero);
> limit -= sizeof(zero);
> }
> - goto complete_insn;
> - }
> + break;
> }
>
> - seg = (modrm_reg & 1) ? x86_seg_idtr : x86_seg_gdtr;
> +#define _GRP7(mod, reg) \
> + (((mod) << 6) | ((reg) << 3)) ... (((mod) << 6) | ((reg)
> << 3) | 7)
> +#define GRP7_MEM(reg) _GRP7(0, reg): case _GRP7(1, reg): case
> _GRP7(2, reg)
> +#define GRP7_ALL(reg) GRP7_MEM(reg): case _GRP7(3, reg)
>
> - switch ( modrm_reg & 7 )
> - {
> - case 0: /* sgdt */
> - case 1: /* sidt */
> + case GRP7_MEM(0): /* sgdt */
> + case GRP7_MEM(1): /* sidt */
> generate_exception_if(ea.type != OP_MEM, EXC_UD);
> generate_exception_if(umip_active(ctxt, ops), EXC_GP,
> 0);
> fail_if(!ops->read_segment || !ops->write);
> @@ -5119,8 +5122,9 @@ x86_emulate(
> op_bytes, ctxt)) != X86EMUL_OKAY )
> goto done;
> break;
> - case 2: /* lgdt */
> - case 3: /* lidt */
> +
> + case GRP7_MEM(2): /* lgdt */
> + case GRP7_MEM(3): /* lidt */
> generate_exception_if(!mode_ring0(), EXC_GP, 0);
> generate_exception_if(ea.type != OP_MEM, EXC_UD);
> fail_if(ops->write_segment == NULL);
> @@ -5138,7 +5142,8 @@ x86_emulate(
> if ( (rc = ops->write_segment(seg, &sreg, ctxt)) )
> goto done;
> break;
> - case 4: /* smsw */
> +
> + case GRP7_ALL(4): /* smsw */
> generate_exception_if(umip_active(ctxt, ops), EXC_GP,
> 0);
> if ( ea.type == OP_MEM )
> {
> @@ -5153,7 +5158,8 @@ x86_emulate(
> if ( (rc = ops->read_cr(0, &dst.val, ctxt)) )
> goto done;
> break;
> - case 6: /* lmsw */
> +
> + case GRP7_ALL(6): /* lmsw */
> fail_if(ops->read_cr == NULL);
> fail_if(ops->write_cr == NULL);
> generate_exception_if(!mode_ring0(), EXC_GP, 0);
> @@ -5169,16 +5175,23 @@ x86_emulate(
> if ( (rc = ops->write_cr(0, cr0, ctxt)) )
> goto done;
> break;
> - case 7: /* invlpg */
> +
> + case GRP7_MEM(7): /* invlpg */
> generate_exception_if(!mode_ring0(), EXC_GP, 0);
> generate_exception_if(ea.type != OP_MEM, EXC_UD);
> fail_if(ops->invlpg == NULL);
> if ( (rc = ops->invlpg(ea.mem.seg, ea.mem.off, ctxt)) )
> goto done;
> break;
> +
> default:
> goto cannot_emulate;
> }
> +
> +#undef GRP7_ALL
> +#undef GRP7_MEM
> +#undef _GRP7
> +
> break;
> }
>
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2017-09-05 17:02 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-09-04 17:21 [PATCH RFC] x86/emul: Fix the handling of unimplemented Grp7 instructions Andrew Cooper
2017-09-04 17:34 ` [PATCH RFC v2] " Andrew Cooper
2017-09-05 6:57 ` Jan Beulich
2017-09-05 7:34 ` Andrew Cooper
2017-09-05 9:43 ` Jan Beulich
2017-09-05 9:53 ` Andrew Cooper
2017-09-05 10:07 ` Jan Beulich
2017-09-05 8:41 ` [PATCH v3] " Andrew Cooper
2017-09-05 10:23 ` Jan Beulich
2017-09-05 17:02 ` Petre Ovidiu PIRCALABU
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