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From: Lan Tianyu <tianyu.lan@intel.com>
To: xen-devel@lists.xen.org
Cc: Lan Tianyu <tianyu.lan@intel.com>,
	kevin.tian@intel.com, sstabellini@kernel.org,
	wei.liu2@citrix.com, George.Dunlap@eu.citrix.com,
	andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com,
	tim@xen.org, jbeulich@suse.com, roger.pau@citrix.com,
	Chao Gao <chao.gao@intel.com>
Subject: [PATCH V3 11/29] x86/hvm: Introduce a emulated VTD for HVM
Date: Thu, 21 Sep 2017 23:01:52 -0400	[thread overview]
Message-ID: <1506049330-11196-12-git-send-email-tianyu.lan@intel.com> (raw)
In-Reply-To: <1506049330-11196-1-git-send-email-tianyu.lan@intel.com>

From: Chao Gao <chao.gao@intel.com>

This patch adds create/destroy function for the emulated VTD
and adapts it to the common VIOMMU abstraction.

Signed-off-by: Chao Gao <chao.gao@intel.com>
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
---
 xen/drivers/passthrough/vtd/Makefile |   7 +-
 xen/drivers/passthrough/vtd/iommu.h  |  23 +++++-
 xen/drivers/passthrough/vtd/vvtd.c   | 147 +++++++++++++++++++++++++++++++++++
 3 files changed, 170 insertions(+), 7 deletions(-)
 create mode 100644 xen/drivers/passthrough/vtd/vvtd.c

diff --git a/xen/drivers/passthrough/vtd/Makefile b/xen/drivers/passthrough/vtd/Makefile
index f302653..163c7fe 100644
--- a/xen/drivers/passthrough/vtd/Makefile
+++ b/xen/drivers/passthrough/vtd/Makefile
@@ -1,8 +1,9 @@
 subdir-$(CONFIG_X86) += x86
 
-obj-y += iommu.o
 obj-y += dmar.o
-obj-y += utils.o
-obj-y += qinval.o
 obj-y += intremap.o
+obj-y += iommu.o
+obj-y += qinval.o
 obj-y += quirks.o
+obj-y += utils.o
+obj-$(CONFIG_VIOMMU) += vvtd.o
diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h
index d7e433e..ef038c9 100644
--- a/xen/drivers/passthrough/vtd/iommu.h
+++ b/xen/drivers/passthrough/vtd/iommu.h
@@ -66,6 +66,12 @@
 #define VER_MAJOR(v)        (((v) & 0xf0) >> 4)
 #define VER_MINOR(v)        ((v) & 0x0f)
 
+/* Supported Adjusted Guest Address Widths */
+#define DMA_CAP_SAGAW_SHIFT         8
+ /* 39-bit AGAW, 3-level page-table */
+#define DMA_CAP_SAGAW_39bit         (0x2ULL << DMA_CAP_SAGAW_SHIFT)
+#define DMA_CAP_ND_64K              6ULL
+
 /*
  * Decoding Capability Register
  */
@@ -74,6 +80,7 @@
 #define cap_write_drain(c)     (((c) >> 54) & 1)
 #define cap_max_amask_val(c)   (((c) >> 48) & 0x3f)
 #define cap_num_fault_regs(c)  ((((c) >> 40) & 0xff) + 1)
+#define cap_set_num_fault_regs(c)  ((((c) - 1) & 0xff) << 40)
 #define cap_pgsel_inv(c)       (((c) >> 39) & 1)
 
 #define cap_super_page_val(c)  (((c) >> 34) & 0xf)
@@ -85,11 +92,13 @@
 #define cap_sps_1tb(c)         ((c >> 37) & 1)
 
 #define cap_fault_reg_offset(c)    ((((c) >> 24) & 0x3ff) * 16)
+#define cap_set_fault_reg_offset(c) ((((c) / 16) & 0x3ff) << 24 )
 
 #define cap_isoch(c)        (((c) >> 23) & 1)
 #define cap_qos(c)        (((c) >> 22) & 1)
 #define cap_mgaw(c)        ((((c) >> 16) & 0x3f) + 1)
-#define cap_sagaw(c)        (((c) >> 8) & 0x1f)
+#define cap_set_mgaw(c)     ((((c) - 1) & 0x3f) << 16)
+#define cap_sagaw(c)        (((c) >> DMA_CAP_SAGAW_SHIFT) & 0x1f)
 #define cap_caching_mode(c)    (((c) >> 7) & 1)
 #define cap_phmr(c)        (((c) >> 6) & 1)
 #define cap_plmr(c)        (((c) >> 5) & 1)
@@ -104,10 +113,16 @@
 #define ecap_niotlb_iunits(e)    ((((e) >> 24) & 0xff) + 1)
 #define ecap_iotlb_offset(e)     ((((e) >> 8) & 0x3ff) * 16)
 #define ecap_coherent(e)         ((e >> 0) & 0x1)
-#define ecap_queued_inval(e)     ((e >> 1) & 0x1)
+#define DMA_ECAP_QI_SHIFT        1
+#define DMA_ECAP_QI              (1ULL << DMA_ECAP_QI_SHIFT)
+#define ecap_queued_inval(e)     ((e >> DMA_ECAP_QI_SHIFT) & 0x1)
 #define ecap_dev_iotlb(e)        ((e >> 2) & 0x1)
-#define ecap_intr_remap(e)       ((e >> 3) & 0x1)
-#define ecap_eim(e)              ((e >> 4) & 0x1)
+#define DMA_ECAP_IR_SHIFT        3
+#define DMA_ECAP_IR              (1ULL << DMA_ECAP_IR_SHIFT)
+#define ecap_intr_remap(e)       ((e >> DMA_ECAP_IR_SHIFT) & 0x1)
+#define DMA_ECAP_EIM_SHIFT       4
+#define DMA_ECAP_EIM             (1ULL << DMA_ECAP_EIM_SHIFT)
+#define ecap_eim(e)              ((e >> DMA_ECAP_EIM_SHIFT) & 0x1)
 #define ecap_cache_hints(e)      ((e >> 5) & 0x1)
 #define ecap_pass_thru(e)        ((e >> 6) & 0x1)
 #define ecap_snp_ctl(e)          ((e >> 7) & 0x1)
diff --git a/xen/drivers/passthrough/vtd/vvtd.c b/xen/drivers/passthrough/vtd/vvtd.c
new file mode 100644
index 0000000..c851ec7
--- /dev/null
+++ b/xen/drivers/passthrough/vtd/vvtd.c
@@ -0,0 +1,147 @@
+/*
+ * vvtd.c
+ *
+ * virtualize VTD for HVM.
+ *
+ * Copyright (C) 2017 Chao Gao, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms and conditions of the GNU General Public
+ * License, version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program; If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <xen/domain_page.h>
+#include <xen/sched.h>
+#include <xen/types.h>
+#include <xen/viommu.h>
+#include <xen/xmalloc.h>
+#include <asm/current.h>
+#include <asm/hvm/domain.h>
+#include <asm/page.h>
+
+#include "iommu.h"
+
+/* Supported capabilities by vvtd */
+unsigned int vvtd_caps = VIOMMU_CAP_IRQ_REMAPPING;
+
+union hvm_hw_vvtd_regs {
+    uint32_t data32[256];
+    uint64_t data64[128];
+};
+
+struct vvtd {
+    /* Address range of remapping hardware register-set */
+    uint64_t base_addr;
+    uint64_t length;
+    /* Point back to the owner domain */
+    struct domain *domain;
+    union hvm_hw_vvtd_regs *regs;
+    struct page_info *regs_page;
+};
+
+static inline void vvtd_set_reg(struct vvtd *vtd, uint32_t reg, uint32_t value)
+{
+    vtd->regs->data32[reg/sizeof(uint32_t)] = value;
+}
+
+static inline uint32_t vvtd_get_reg(struct vvtd *vtd, uint32_t reg)
+{
+    return vtd->regs->data32[reg/sizeof(uint32_t)];
+}
+
+static inline void vvtd_set_reg_quad(struct vvtd *vtd, uint32_t reg,
+                                     uint64_t value)
+{
+    vtd->regs->data64[reg/sizeof(uint64_t)] = value;
+}
+
+static inline uint64_t vvtd_get_reg_quad(struct vvtd *vtd, uint32_t reg)
+{
+    return vtd->regs->data64[reg/sizeof(uint64_t)];
+}
+
+static void vvtd_reset(struct vvtd *vvtd, uint64_t capability)
+{
+    uint64_t cap = cap_set_num_fault_regs(1ULL) |
+                   cap_set_fault_reg_offset(0x220ULL) |
+                   cap_set_mgaw(39ULL) | DMA_CAP_SAGAW_39bit |
+                   DMA_CAP_ND_64K;
+    uint64_t ecap = DMA_ECAP_IR | DMA_ECAP_EIM | DMA_ECAP_QI;
+
+    vvtd_set_reg(vvtd, DMAR_VER_REG, 0x10UL);
+    vvtd_set_reg_quad(vvtd, DMAR_CAP_REG, cap);
+    vvtd_set_reg_quad(vvtd, DMAR_ECAP_REG, ecap);
+    vvtd_set_reg(vvtd, DMAR_FECTL_REG, 0x80000000UL);
+    vvtd_set_reg(vvtd, DMAR_IECTL_REG, 0x80000000UL);
+}
+
+static int vvtd_create(struct domain *d, struct viommu *viommu)
+{
+    struct vvtd *vvtd;
+    int ret;
+
+    if ( !is_hvm_domain(d) || (viommu->base_address & (PAGE_SIZE - 1)) ||
+        (~vvtd_caps & viommu->caps) )
+        return -EINVAL;
+
+    ret = -ENOMEM;
+    vvtd = xzalloc_bytes(sizeof(struct vvtd));
+    if ( !vvtd )
+        return ret;
+
+    vvtd->regs_page = alloc_domheap_page(d, MEMF_no_owner);
+    if ( !vvtd->regs_page )
+        goto out1;
+
+    vvtd->regs = __map_domain_page_global(vvtd->regs_page);
+    if ( !vvtd->regs )
+        goto out2;
+    clear_page(vvtd->regs);
+
+    vvtd_reset(vvtd, viommu->caps);
+    vvtd->base_addr = viommu->base_address;
+    vvtd->domain = d;
+
+    viommu->priv = vvtd;
+
+    return 0;
+
+ out2:
+    free_domheap_page(vvtd->regs_page);
+ out1:
+    xfree(vvtd);
+    return ret;
+}
+
+static int vvtd_destroy(struct viommu *viommu)
+{
+    struct vvtd *vvtd = viommu->priv;
+
+    if ( vvtd )
+    {
+        unmap_domain_page_global(vvtd->regs);
+        free_domheap_page(vvtd->regs_page);
+        xfree(vvtd);
+    }
+    return 0;
+}
+
+struct viommu_ops vvtd_hvm_vmx_ops = {
+    .create = vvtd_create,
+    .destroy = vvtd_destroy
+};
+
+static int vvtd_register(void)
+{
+    viommu_register_type(VIOMMU_TYPE_INTEL_VTD, &vvtd_hvm_vmx_ops);
+    return 0;
+}
+__initcall(vvtd_register);
-- 
1.8.3.1


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  parent reply	other threads:[~2017-09-22  3:01 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-22  3:01 [PATCH V3 00/29] Lan Tianyu
2017-09-22  3:01 ` [PATCH V3 1/29] Xen/doc: Add Xen virtual IOMMU doc Lan Tianyu
2017-10-18 13:26   ` Roger Pau Monné
2017-10-19  2:26     ` Lan Tianyu
2017-10-19  8:49       ` Roger Pau Monné
2017-10-19 11:28         ` Jan Beulich
2017-10-24  7:16           ` Lan Tianyu
2017-09-22  3:01 ` [PATCH V3 2/29] VIOMMU: Add vIOMMU helper functions to create, destroy vIOMMU instance Lan Tianyu
2017-10-18 14:05   ` Roger Pau Monné
2017-10-19  6:31     ` Lan Tianyu
2017-10-19  8:47       ` Roger Pau Monné
2017-10-25  1:43         ` Lan Tianyu
2017-10-30  1:41           ` Lan Tianyu
2017-10-30  9:54             ` Roger Pau Monné
2017-10-30  1:51     ` Lan Tianyu
2017-11-06  8:19       ` Jan Beulich
2017-09-22  3:01 ` [PATCH V3 3/29] DOMCTL: Introduce new DOMCTL commands for vIOMMU support Lan Tianyu
2017-10-18 14:18   ` Roger Pau Monné
2017-10-19  6:41     ` Lan Tianyu
2017-09-22  3:01 ` [PATCH V3 4/29] tools/libacpi: Add DMA remapping reporting (DMAR) ACPI table structures Lan Tianyu
2017-10-18 14:36   ` Roger Pau Monné
2017-10-19  6:46     ` Lan Tianyu
2017-09-22  3:01 ` [PATCH V3 5/29] tools/libacpi: Add new fields in acpi_config for DMAR table Lan Tianyu
2017-10-18 15:12   ` Roger Pau Monné
2017-10-19  8:09     ` Lan Tianyu
2017-10-19  8:40       ` Roger Pau Monné
2017-10-25  6:06         ` Lan Tianyu
2017-10-19 11:31       ` Jan Beulich
2017-09-22  3:01 ` [PATCH V3 6/29] tools/libxl: Add a user configurable parameter to control vIOMMU attributes Lan Tianyu
2017-10-19  9:49   ` Roger Pau Monné
2017-10-20  1:36     ` Chao Gao
2017-09-22  3:01 ` [PATCH V3 7/29] tools/libxl: build DMAR table for a guest with one virtual VTD Lan Tianyu
2017-10-19 10:00   ` Roger Pau Monné
2017-10-20  1:44     ` Chao Gao
2017-09-22  3:01 ` [PATCH V3 8/29] tools/libxl: create vIOMMU during domain construction Lan Tianyu
2017-10-19 10:13   ` Roger Pau Monné
2017-10-26 12:05     ` Wei Liu
2017-10-27  1:58       ` Lan Tianyu
2017-09-22  3:01 ` [PATCH V3 9/29] tools/libxc: Add viommu operations in libxc Lan Tianyu
2017-10-19 10:17   ` Roger Pau Monné
2017-09-22  3:01 ` [PATCH V3 10/29] vtd: add and align register definitions Lan Tianyu
2017-10-19 10:21   ` Roger Pau Monné
2017-10-20  1:47     ` Chao Gao
2017-09-22  3:01 ` Lan Tianyu [this message]
2017-10-19 11:20   ` [PATCH V3 11/29] x86/hvm: Introduce a emulated VTD for HVM Roger Pau Monné
2017-10-20  2:46     ` Chao Gao
2017-10-20  6:56       ` Jan Beulich
2017-10-20  6:12         ` Chao Gao
2017-10-20  8:37         ` Lan Tianyu
2017-09-22  3:01 ` [PATCH V3 12/29] x86/vvtd: Add MMIO handler for VVTD Lan Tianyu
2017-10-19 11:34   ` Roger Pau Monné
2017-10-20  2:58     ` Chao Gao
2017-10-20  9:51       ` Roger Pau Monné
2017-09-22  3:01 ` [PATCH V3 13/29] x86/vvtd: Set Interrupt Remapping Table Pointer through GCMD Lan Tianyu
2017-10-19 11:56   ` Roger Pau Monné
2017-10-20  4:08     ` Chao Gao
2017-10-20  6:57       ` Jan Beulich
2017-09-22  3:01 ` [PATCH V3 14/29] x86/vvtd: Enable Interrupt Remapping " Lan Tianyu
2017-10-19 13:42   ` Roger Pau Monné
2017-09-22  3:01 ` [PATCH V3 15/29] x86/vvtd: Process interrupt remapping request Lan Tianyu
2017-10-19 14:26   ` Roger Pau Monné
2017-10-20  5:16     ` Chao Gao
2017-10-20 10:01       ` Roger Pau Monné
2017-10-23  6:44         ` Chao Gao
2017-09-22  3:01 ` [PATCH V3 16/29] x86/vvtd: decode interrupt attribute from IRTE Lan Tianyu
2017-10-19 14:39   ` Roger Pau Monné
2017-10-20  5:22     ` Chao Gao
2017-09-22  3:01 ` [PATCH V3 17/29] x86/vvtd: add a helper function to decide the interrupt format Lan Tianyu
2017-10-19 14:43   ` Roger Pau Monné
2017-09-22  3:01 ` [PATCH V3 18/29] VIOMMU: Add irq request callback to deal with irq remapping Lan Tianyu
2017-10-19 15:00   ` Roger Pau Monné
2017-09-22  3:02 ` [PATCH V3 19/29] x86/vioapic: Hook interrupt delivery of vIOAPIC Lan Tianyu
2017-10-19 15:37   ` Roger Pau Monné
2017-09-22  3:02 ` [PATCH V3 20/29] VIOMMU: Add get irq info callback to convert irq remapping request Lan Tianyu
2017-10-19 15:42   ` Roger Pau Monné
2017-10-25  7:30     ` Lan Tianyu
2017-10-25  7:43       ` Roger Pau Monné
2017-10-25  7:38         ` Lan Tianyu
2017-09-22  3:02 ` [PATCH V3 21/29] VIOMMU: Introduce callback of checking irq remapping mode Lan Tianyu
2017-10-19 15:43   ` Roger Pau Monné
2017-09-22  3:02 ` [PATCH V3 22/29] x86/vioapic: extend vioapic_get_vector() to support remapping format RTE Lan Tianyu
2017-10-19 15:49   ` Roger Pau Monné
2017-10-19 15:56     ` Jan Beulich
2017-10-20  1:04       ` Chao Gao
2017-09-22  3:02 ` [PATCH V3 23/29] passthrough: move some fields of hvm_gmsi_info to a sub-structure Lan Tianyu
2017-09-22  3:02 ` [PATCH V3 24/29] tools/libxc: Add a new interface to bind remapping format msi with pirq Lan Tianyu
2017-10-19 16:03   ` Roger Pau Monné
2017-10-20  5:39     ` Chao Gao
2017-09-22  3:02 ` [PATCH V3 25/29] x86/vmsi: Hook delivering remapping format msi to guest Lan Tianyu
2017-10-19 16:07   ` Roger Pau Monné
2017-10-20  6:48     ` Jan Beulich
2017-09-22  3:02 ` [PATCH V3 26/29] x86/vvtd: Handle interrupt translation faults Lan Tianyu
2017-10-19 16:31   ` Roger Pau Monné
2017-10-20  5:54     ` Chao Gao
2017-10-20 10:08       ` Roger Pau Monné
2017-10-20 14:20         ` Jan Beulich
2017-09-22  3:02 ` [PATCH V3 27/29] x86/vvtd: Enable Queued Invalidation through GCMD Lan Tianyu
2017-10-20 10:30   ` Roger Pau Monné
2017-09-22  3:02 ` [PATCH V3 28/29] x86/vvtd: Add queued invalidation (QI) support Lan Tianyu
2017-10-20 11:20   ` Roger Pau Monné
2017-10-23  7:50     ` Chao Gao
2017-10-23  8:57       ` Roger Pau Monné
2017-10-23  8:52         ` Chao Gao
2017-10-23 23:26           ` Tian, Kevin
2017-09-22  3:02 ` [PATCH V3 29/29] x86/vvtd: save and restore emulated VT-d Lan Tianyu
2017-10-20 11:25   ` Roger Pau Monné
2017-10-20 11:36 ` [PATCH V3 00/29] Roger Pau Monné
2017-10-23  1:23   ` Lan Tianyu

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