From: Yi Sun <yi.y.sun@linux.intel.com>
To: xen-devel@lists.xenproject.org
Cc: "Wei Liu" <wei.liu2@citrix.com>,
"Yi Sun" <yi.y.sun@linux.intel.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Jan Beulich" <jbeulich@suse.com>,
"Chao Peng" <chao.p.peng@linux.intel.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH v8 03/16] x86: rename 'cbm_type' to 'psr_type' to make it general
Date: Mon, 16 Oct 2017 11:04:08 +0800 [thread overview]
Message-ID: <1508123061-6600-4-git-send-email-yi.y.sun@linux.intel.com> (raw)
In-Reply-To: <1508123061-6600-1-git-send-email-yi.y.sun@linux.intel.com>
This patch renames 'cbm_type' to 'psr_type' to generalize it.
Then, we can reuse this for all psr allocation features.
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
---
CC: Jan Beulich <jbeulich@suse.com>
CC: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Chao Peng <chao.p.peng@linux.intel.com>
v5:
- correct character of reviewer's name.
(suggested by Jan Beulich)
v4:
- fix words in commit message.
(suggested by Roger Pau Monné)
v3:
- replace 'psr_val_type' to 'psr_type' and remove '_VAL' from the enum
items.
(suggested by Roger Pau Monné)
v2:
- replace 'PSR_VAL_TYPE_{L3, L2}' to 'PSR_VAL_TYPE_{L3, L2}_CBM'.
(suggested by Chao Peng)
---
xen/arch/x86/domctl.c | 16 ++++++------
xen/arch/x86/psr.c | 62 +++++++++++++++++++++++++----------------------
xen/arch/x86/sysctl.c | 4 +--
xen/include/asm-x86/psr.h | 18 +++++++-------
4 files changed, 52 insertions(+), 48 deletions(-)
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 1cffe93..bc025ce 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1444,25 +1444,25 @@ long arch_do_domctl(
case XEN_DOMCTL_PSR_SET_L3_CBM:
ret = psr_set_val(d, domctl->u.psr_alloc.target,
domctl->u.psr_alloc.data,
- PSR_CBM_TYPE_L3);
+ PSR_TYPE_L3_CBM);
break;
case XEN_DOMCTL_PSR_SET_L3_CODE:
ret = psr_set_val(d, domctl->u.psr_alloc.target,
domctl->u.psr_alloc.data,
- PSR_CBM_TYPE_L3_CODE);
+ PSR_TYPE_L3_CODE);
break;
case XEN_DOMCTL_PSR_SET_L3_DATA:
ret = psr_set_val(d, domctl->u.psr_alloc.target,
domctl->u.psr_alloc.data,
- PSR_CBM_TYPE_L3_DATA);
+ PSR_TYPE_L3_DATA);
break;
case XEN_DOMCTL_PSR_SET_L2_CBM:
ret = psr_set_val(d, domctl->u.psr_alloc.target,
domctl->u.psr_alloc.data,
- PSR_CBM_TYPE_L2);
+ PSR_TYPE_L2_CBM);
break;
#define domctl_psr_get_val(d, domctl, type, copyback) ({ \
@@ -1476,19 +1476,19 @@ long arch_do_domctl(
})
case XEN_DOMCTL_PSR_GET_L3_CBM:
- ret = domctl_psr_get_val(d, domctl, PSR_CBM_TYPE_L3, copyback);
+ ret = domctl_psr_get_val(d, domctl, PSR_TYPE_L3_CBM, copyback);
break;
case XEN_DOMCTL_PSR_GET_L3_CODE:
- ret = domctl_psr_get_val(d, domctl, PSR_CBM_TYPE_L3_CODE, copyback);
+ ret = domctl_psr_get_val(d, domctl, PSR_TYPE_L3_CODE, copyback);
break;
case XEN_DOMCTL_PSR_GET_L3_DATA:
- ret = domctl_psr_get_val(d, domctl, PSR_CBM_TYPE_L3_DATA, copyback);
+ ret = domctl_psr_get_val(d, domctl, PSR_TYPE_L3_DATA, copyback);
break;
case XEN_DOMCTL_PSR_GET_L2_CBM:
- ret = domctl_psr_get_val(d, domctl, PSR_CBM_TYPE_L2, copyback);
+ ret = domctl_psr_get_val(d, domctl, PSR_TYPE_L2_CBM, copyback);
break;
#undef domctl_psr_get_val
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 11c204e..6dce823 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -100,24 +100,24 @@ static const struct feat_props {
unsigned int cos_num;
/*
- * An array to save all 'enum cbm_type' values of the feature. It is
+ * An array to save all 'enum psr_type' values of the feature. It is
* used with cos_num together to get/write a feature's COS registers
* values one by one.
*/
- enum cbm_type type[MAX_COS_NUM];
+ enum psr_type type[MAX_COS_NUM];
/*
* alt_type is 'alternative type'. When this 'alt_type' is input, the
* feature does some special operations.
*/
- enum cbm_type alt_type;
+ enum psr_type alt_type;
/* get_feat_info is used to return feature HW info through sysctl. */
bool (*get_feat_info)(const struct feat_node *feat,
uint32_t data[], unsigned int array_len);
/* write_msr is used to write out feature MSR register. */
- void (*write_msr)(unsigned int cos, uint32_t val, enum cbm_type type);
+ void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type);
} *feat_props[FEAT_TYPE_NUM];
/*
@@ -215,13 +215,13 @@ static void free_socket_resources(unsigned int socket)
bitmap_zero(info->dom_set, DOMID_IDLE + 1);
}
-static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
+static enum psr_feat_type psr_type_to_feat_type(enum psr_type type)
{
enum psr_feat_type feat_type = FEAT_TYPE_UNKNOWN;
switch ( type )
{
- case PSR_CBM_TYPE_L3:
+ case PSR_TYPE_L3_CBM:
feat_type = FEAT_TYPE_L3_CAT;
/*
@@ -233,12 +233,12 @@ static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type)
break;
- case PSR_CBM_TYPE_L3_DATA:
- case PSR_CBM_TYPE_L3_CODE:
+ case PSR_TYPE_L3_DATA:
+ case PSR_TYPE_L3_CODE:
feat_type = FEAT_TYPE_L3_CDP;
break;
- case PSR_CBM_TYPE_L2:
+ case PSR_TYPE_L2_CBM:
feat_type = FEAT_TYPE_L2_CAT;
break;
@@ -362,15 +362,16 @@ static bool cat_get_feat_info(const struct feat_node *feat,
}
/* L3 CAT props */
-static void l3_cat_write_msr(unsigned int cos, uint32_t val, enum cbm_type type)
+static void l3_cat_write_msr(unsigned int cos, uint32_t val,
+ enum psr_type type)
{
wrmsrl(MSR_IA32_PSR_L3_MASK(cos), val);
}
static const struct feat_props l3_cat_props = {
.cos_num = 1,
- .type[0] = PSR_CBM_TYPE_L3,
- .alt_type = PSR_CBM_TYPE_UNKNOWN,
+ .type[0] = PSR_TYPE_L3_CBM,
+ .alt_type = PSR_TYPE_UNKNOWN,
.get_feat_info = cat_get_feat_info,
.write_msr = l3_cat_write_msr,
};
@@ -387,9 +388,10 @@ static bool l3_cdp_get_feat_info(const struct feat_node *feat,
return true;
}
-static void l3_cdp_write_msr(unsigned int cos, uint32_t val, enum cbm_type type)
+static void l3_cdp_write_msr(unsigned int cos, uint32_t val,
+ enum psr_type type)
{
- wrmsrl(((type == PSR_CBM_TYPE_L3_DATA) ?
+ wrmsrl(((type == PSR_TYPE_L3_DATA) ?
MSR_IA32_PSR_L3_MASK_DATA(cos) :
MSR_IA32_PSR_L3_MASK_CODE(cos)),
val);
@@ -397,23 +399,24 @@ static void l3_cdp_write_msr(unsigned int cos, uint32_t val, enum cbm_type type)
static const struct feat_props l3_cdp_props = {
.cos_num = 2,
- .type[0] = PSR_CBM_TYPE_L3_DATA,
- .type[1] = PSR_CBM_TYPE_L3_CODE,
- .alt_type = PSR_CBM_TYPE_L3,
+ .type[0] = PSR_TYPE_L3_DATA,
+ .type[1] = PSR_TYPE_L3_CODE,
+ .alt_type = PSR_TYPE_L3_CBM,
.get_feat_info = l3_cdp_get_feat_info,
.write_msr = l3_cdp_write_msr,
};
/* L2 CAT props */
-static void l2_cat_write_msr(unsigned int cos, uint32_t val, enum cbm_type type)
+static void l2_cat_write_msr(unsigned int cos, uint32_t val,
+ enum psr_type type)
{
wrmsrl(MSR_IA32_PSR_L2_MASK(cos), val);
}
static const struct feat_props l2_cat_props = {
.cos_num = 1,
- .type[0] = PSR_CBM_TYPE_L2,
- .alt_type = PSR_CBM_TYPE_UNKNOWN,
+ .type[0] = PSR_TYPE_L2_CBM,
+ .alt_type = PSR_TYPE_UNKNOWN,
.get_feat_info = cat_get_feat_info,
.write_msr = l2_cat_write_msr,
};
@@ -675,7 +678,7 @@ static struct psr_socket_info *get_socket_info(unsigned int socket)
return socket_info + socket;
}
-int psr_get_info(unsigned int socket, enum cbm_type type,
+int psr_get_info(unsigned int socket, enum psr_type type,
uint32_t data[], unsigned int array_len)
{
const struct psr_socket_info *info = get_socket_info(socket);
@@ -687,7 +690,7 @@ int psr_get_info(unsigned int socket, enum cbm_type type,
if ( IS_ERR(info) )
return PTR_ERR(info);
- feat_type = psr_cbm_type_to_feat_type(type);
+ feat_type = psr_type_to_feat_type(type);
if ( feat_type >= ARRAY_SIZE(info->features) )
return -ENOENT;
@@ -708,7 +711,7 @@ int psr_get_info(unsigned int socket, enum cbm_type type,
}
int psr_get_val(struct domain *d, unsigned int socket,
- uint32_t *val, enum cbm_type type)
+ uint32_t *val, enum psr_type type)
{
const struct psr_socket_info *info = get_socket_info(socket);
const struct feat_node *feat;
@@ -720,7 +723,7 @@ int psr_get_val(struct domain *d, unsigned int socket,
if ( IS_ERR(info) )
return PTR_ERR(info);
- feat_type = psr_cbm_type_to_feat_type(type);
+ feat_type = psr_type_to_feat_type(type);
if ( feat_type >= ARRAY_SIZE(info->features) )
return -ENOENT;
@@ -850,7 +853,7 @@ static int insert_val_into_array(uint32_t val[],
unsigned int array_len,
const struct psr_socket_info *info,
enum psr_feat_type feat_type,
- enum cbm_type type,
+ enum psr_type type,
uint32_t new_val)
{
const struct feat_node *feat;
@@ -886,8 +889,9 @@ static int insert_val_into_array(uint32_t val[],
/*
* Value setting position is same as feature array.
* For CDP, user may set both DATA and CODE to same value. For such case,
- * user input 'PSR_CBM_TYPE_L3' as type. The alternative type of CDP is same
- * as it. So we should set new_val to both of DATA and CODE under such case.
+ * user input 'PSR_TYPE_L3_CBM' as type. The alternative type of CDP is
+ * same as it. So we should set new_val to both of DATA and CODE under such
+ * case.
*/
for ( i = 0; i < props->cos_num; i++ )
{
@@ -1179,7 +1183,7 @@ static int write_psr_msrs(unsigned int socket, unsigned int cos,
}
int psr_set_val(struct domain *d, unsigned int socket,
- uint64_t new_val, enum cbm_type type)
+ uint64_t new_val, enum psr_type type)
{
unsigned int old_cos, array_len;
int cos, ret;
@@ -1195,7 +1199,7 @@ int psr_set_val(struct domain *d, unsigned int socket,
if ( new_val != val )
return -EINVAL;
- feat_type = psr_cbm_type_to_feat_type(type);
+ feat_type = psr_type_to_feat_type(type);
if ( feat_type >= ARRAY_SIZE(info->features) ||
!info->features[feat_type] )
return -ENOENT;
diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
index 8ae6747..6867ee1 100644
--- a/xen/arch/x86/sysctl.c
+++ b/xen/arch/x86/sysctl.c
@@ -179,7 +179,7 @@ long arch_do_sysctl(
case XEN_SYSCTL_PSR_get_l3_info:
{
ret = psr_get_info(sysctl->u.psr_alloc.target,
- PSR_CBM_TYPE_L3, data, ARRAY_SIZE(data));
+ PSR_TYPE_L3_CBM, data, ARRAY_SIZE(data));
if ( ret )
break;
@@ -198,7 +198,7 @@ long arch_do_sysctl(
case XEN_SYSCTL_PSR_get_l2_info:
{
ret = psr_get_info(sysctl->u.psr_alloc.target,
- PSR_CBM_TYPE_L2, data, ARRAY_SIZE(data));
+ PSR_TYPE_L2_CBM, data, ARRAY_SIZE(data));
if ( ret )
break;
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index 18a42f3..cb3f067 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -53,12 +53,12 @@ struct psr_cmt {
struct psr_cmt_l3 l3;
};
-enum cbm_type {
- PSR_CBM_TYPE_L3,
- PSR_CBM_TYPE_L3_CODE,
- PSR_CBM_TYPE_L3_DATA,
- PSR_CBM_TYPE_L2,
- PSR_CBM_TYPE_UNKNOWN,
+enum psr_type {
+ PSR_TYPE_L3_CBM,
+ PSR_TYPE_L3_CODE,
+ PSR_TYPE_L3_DATA,
+ PSR_TYPE_L2_CBM,
+ PSR_TYPE_UNKNOWN,
};
extern struct psr_cmt *psr_cmt;
@@ -72,12 +72,12 @@ int psr_alloc_rmid(struct domain *d);
void psr_free_rmid(struct domain *d);
void psr_ctxt_switch_to(struct domain *d);
-int psr_get_info(unsigned int socket, enum cbm_type type,
+int psr_get_info(unsigned int socket, enum psr_type type,
uint32_t data[], unsigned int array_len);
int psr_get_val(struct domain *d, unsigned int socket,
- uint32_t *val, enum cbm_type type);
+ uint32_t *val, enum psr_type type);
int psr_set_val(struct domain *d, unsigned int socket,
- uint64_t val, enum cbm_type type);
+ uint64_t val, enum psr_type type);
void psr_domain_init(struct domain *d);
void psr_domain_free(struct domain *d);
--
1.9.1
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next prev parent reply other threads:[~2017-10-16 3:25 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-16 3:04 [PATCH v8 00/16] Enable Memory Bandwidth Allocation in Xen Yi Sun
2017-10-16 3:04 ` [PATCH v8 01/16] docs: create Memory Bandwidth Allocation (MBA) feature document Yi Sun
2017-10-16 3:04 ` [PATCH v8 02/16] Rename PSR sysctl/domctl interfaces and xsm policy to make them be general Yi Sun
2017-10-18 14:14 ` Jan Beulich
2017-10-18 14:58 ` Wei Liu
2017-10-19 1:22 ` [PATCH v9 " Yi Sun
2017-10-19 11:36 ` Jan Beulich
2017-10-19 12:01 ` Yi Sun
2017-10-16 3:04 ` Yi Sun [this message]
2017-10-16 3:04 ` [PATCH v8 04/16] x86: a few optimizations to psr codes Yi Sun
2017-10-16 3:04 ` [PATCH v8 05/16] x86: implement data structure and CPU init flow for MBA Yi Sun
2017-10-16 3:04 ` [PATCH v8 06/16] x86: implement get hw info " Yi Sun
2017-10-16 3:04 ` [PATCH v8 07/16] x86: implement get value interface " Yi Sun
2017-10-16 3:04 ` [PATCH v8 08/16] x86: implement set value flow " Yi Sun
2017-10-16 12:49 ` Jan Beulich
2017-10-17 1:14 ` Yi Sun
2017-10-17 1:04 ` [PATCH v9 " Yi Sun
2017-10-17 1:27 ` Yi Sun
2017-10-17 1:05 ` [PATCH v9.1 " Yi Sun
2017-10-16 3:04 ` [PATCH v8 09/16] tools: create general interfaces to support psr allocation features Yi Sun
2017-10-16 3:04 ` [PATCH v8 10/16] tools: implement the new libxc get hw info interface Yi Sun
2017-10-16 3:04 ` [PATCH v8 11/16] tools: implement the new libxl " Yi Sun
2017-10-16 3:04 ` [PATCH v8 12/16] tools: implement the new xl " Yi Sun
2017-10-16 3:04 ` [PATCH v8 13/16] tools: rename 'xc_psr_cat_type' to 'xc_psr_type' Yi Sun
2017-10-16 3:04 ` [PATCH v8 14/16] tools: implement new generic get value interface and MBA get value command Yi Sun
2017-10-16 3:04 ` [PATCH v8 15/16] tools: implement new generic set value interface and MBA set " Yi Sun
2017-10-16 3:04 ` [PATCH v8 16/16] docs: add MBA description in docs Yi Sun
2017-10-19 20:08 ` [PATCH v8 00/16] Enable Memory Bandwidth Allocation in Xen Konrad Rzeszutek Wilk
2017-10-20 1:20 ` Yi Sun
2017-10-20 1:45 ` Yi Sun
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