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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xen.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: [PATCH v6.5 10/26] common/wait: Clarifications to wait infrastructure
Date: Thu, 4 Jan 2018 00:15:39 +0000	[thread overview]
Message-ID: <1515024955-13390-11-git-send-email-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <1515024955-13390-1-git-send-email-andrew.cooper3@citrix.com>

This logic is not as clear as it could be.  Add some comments to help.

Rearrange the asm block in __prepare_to_wait() to separate the GPR
saving/restoring from the internal logic.

While tweaking, add an unreachable() following the jmp in
check_wakeup_from_wait().

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
v6:
 * New
---
 xen/common/wait.c | 31 ++++++++++++++++++++++++-------
 1 file changed, 24 insertions(+), 7 deletions(-)

diff --git a/xen/common/wait.c b/xen/common/wait.c
index c5fc094..3d3d9fe 100644
--- a/xen/common/wait.c
+++ b/xen/common/wait.c
@@ -138,14 +138,26 @@ static void __prepare_to_wait(struct waitqueue_vcpu *wqv)
         domain_crash_synchronous();
     }
 
+    /* Hand-rolled setjmp(). */
     asm volatile (
-        "push %%rax; push %%rbx; push %%rdx; "
-        "push %%rbp; push %%r8; push %%r9; push %%r10; push %%r11; "
-        "push %%r12; push %%r13; push %%r14; push %%r15; call 1f; "
-        "1: addq $2f-1b,(%%rsp); sub %%esp,%%ecx; cmp %3,%%ecx; ja 3f; "
-        "mov %%rsp,%%rsi; 2: rep movsb; mov %%rsp,%%rsi; 3: pop %%rax; "
-        "pop %%r15; pop %%r14; pop %%r13; pop %%r12; "
-        "pop %%r11; pop %%r10; pop %%r9; pop %%r8; "
+        "push %%rax; push %%rbx; push %%rdx; push %%rbp;"
+        "push %%r8;  push %%r9;  push %%r10; push %%r11;"
+        "push %%r12; push %%r13; push %%r14; push %%r15;"
+
+        "call 1f;"
+        "1: addq $2f-1b,(%%rsp);"
+        "sub %%esp,%%ecx;"
+        "cmp %3,%%ecx;"
+        "ja 3f;"
+        "mov %%rsp,%%rsi;"
+
+        /* check_wakeup_from_wait() longjmp()'s to this point. */
+        "2: rep movsb;"
+        "mov %%rsp,%%rsi;"
+        "3: pop %%rax;"
+
+        "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
+        "pop %%r11; pop %%r10; pop %%r9;  pop %%r8;"
         "pop %%rbp; pop %%rdx; pop %%rbx; pop %%rax"
         : "=&S" (wqv->esp), "=&c" (dummy), "=&D" (dummy)
         : "i" (PAGE_SIZE), "0" (0), "1" (cpu_info), "2" (wqv->stack)
@@ -189,11 +201,16 @@ void check_wakeup_from_wait(void)
         wait(); /* takes us back into the scheduler */
     }
 
+    /*
+     * Hand-rolled longjmp().  Returns to the pointer on the top of
+     * wqv->stack, and lands on a `rep movs` instruction.
+     */
     asm volatile (
         "mov %1,%%"__OP"sp; jmp *(%0)"
         : : "S" (wqv->stack), "D" (wqv->esp),
         "c" ((char *)get_cpu_info() - (char *)wqv->esp)
         : "memory" );
+    unreachable();
 }
 
 #else /* !CONFIG_X86 */
-- 
2.1.4


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  parent reply	other threads:[~2018-01-04  0:15 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-04  0:15 [PATCH v6.5 00/26] x86: Mitigations for SP2/CVE-2017-5715/Branch Target Injection Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 01/26] x86/alt: Break out alternative-asm into a separate header file Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 02/26] x86/alt: Introduce ALTERNATIVE{, _2} macros Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 03/26] x86/hvm: Rename update_guest_vendor() callback to cpuid_policy_changed() Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 04/26] x86: Introduce a common cpuid_policy_updated() Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 05/26] x86/entry: Remove support for partial cpu_user_regs frames Andrew Cooper
2018-01-04  8:51   ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 06/26] x86/entry: Rearrange RESTORE_ALL to restore register in stack order Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 07/26] x86/hvm: Use SAVE_ALL to construct the cpu_user_regs frame after VMExit Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 08/26] x86/entry: Erase guest GPR state on entry to Xen Andrew Cooper
2018-01-22 10:04   ` David Woodhouse
2018-01-22 10:18     ` Andrew Cooper
2018-01-22 10:27       ` David Woodhouse
2018-01-04  0:15 ` [PATCH v6.5 09/26] x86: Support compiling with indirect branch thunks Andrew Cooper
2018-01-04  9:02   ` Jan Beulich
2018-01-04  0:15 ` Andrew Cooper [this message]
2018-01-04  0:15 ` [PATCH v6.5 11/26] x86: Support indirect thunks from assembly code Andrew Cooper
2018-01-04  9:23   ` Jan Beulich
2018-01-08 18:24     ` Andrew Cooper
2018-01-09  8:36       ` Jan Beulich
2018-01-09 11:23         ` Andrew Cooper
2018-01-09 13:18           ` Jan Beulich
2018-01-11 13:03   ` David Woodhouse
2018-01-11 13:41     ` Andrew Cooper
2018-01-11 13:46       ` David Woodhouse
2018-01-04  0:15 ` [PATCH v6.5 12/26] x86/boot: Report details of speculative mitigations Andrew Cooper
2018-01-04  9:29   ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 13/26] x86/amd: Try to set lfence as being Dispatch Serialising Andrew Cooper
2018-01-04  9:32   ` Jan Beulich
2018-01-08 19:01     ` Andrew Cooper
2018-01-09  8:38       ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 14/26] x86: Introduce alternative indirect thunks Andrew Cooper
2018-01-04  9:40   ` Jan Beulich
2018-01-09 11:44     ` Andrew Cooper
2018-01-09 13:24       ` Jan Beulich
2018-01-09 13:30         ` Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 15/26] x86/feature: Definitions for Indirect Branch Controls Andrew Cooper
2018-01-04  1:14   ` Doug Goldstein
2018-01-04  1:16     ` Andrew Cooper
2018-01-04  4:05     ` Anthony Liguori
2018-01-04  9:42   ` Jan Beulich
2018-01-04 18:51   ` Wei Liu
2018-01-04  0:15 ` [PATCH v6.5 16/26] x86/cmdline: Introduce a command line option to disable IBRS/IBPB, STIBP and IBPB Andrew Cooper
2018-01-04  9:43   ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 17/26] x86/msr: Emulation of MSR_{SPEC_CTRL, PRED_CMD} for guests Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 18/26] x86/migrate: Move MSR_SPEC_CTRL on migrate Andrew Cooper
2018-01-04  0:15 ` [PATCH v6.5 19/26] x86/hvm: Permit guests direct access to MSR_{SPEC_CTRL, PRED_CMD} Andrew Cooper
2018-01-04  9:52   ` Jan Beulich
2018-01-09 12:03     ` Andrew Cooper
2018-01-09 13:28       ` Jan Beulich
2018-01-09 13:34         ` Andrew Cooper
2018-01-09 13:58           ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 20/26] x86: Protect unaware domains from meddling hyperthreads Andrew Cooper
2018-01-04  9:59   ` Jan Beulich
2018-01-09 14:21     ` Andrew Cooper
2018-01-09 14:29       ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 21/26] x86/entry: Use MSR_SPEC_CTRL at each entry/exit point Andrew Cooper
2018-01-04 10:14   ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 22/26] x86/boot: Calculate the most appropriate BTI mitigation to use Andrew Cooper
2018-01-04 10:17   ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 23/26] x86/entry: Clobber the Return Stack Buffer on entry to Xen Andrew Cooper
2018-01-04 10:22   ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 24/26] x86/ctxt: Issue a speculation barrier between vcpu contexts Andrew Cooper
2018-01-04 10:25   ` Jan Beulich
2018-01-04  0:15 ` [PATCH v6.5 25/26] x86/cpuid: Offer Indirect Branch Controls to guests Andrew Cooper
2018-01-09 11:44   ` Wei Liu
2018-01-04  0:15 ` [PATCH v6.5 26/26] x86/idle: Clear SPEC_CTRL while idle Andrew Cooper
2018-01-04 10:29   ` Jan Beulich
2018-01-04 10:41   ` Jan Beulich

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