[PATCH RFC 40/44] x86/boot: Switch the APs to the percpu pagetables before entering C

[Andrew Cooper <andrew.cooper3@citrix.com>]

This is in preparation for the APs to switch to their percpu stack before
entering C.

This requires splitting the BSP and AP paths in __high_start(), and for
do_boot_cpu() to pass the appropriate pagetables.  The result is that
early_switch_to_idle() no longer needs to switch pagetables, but the switch
does need to retained for the BSP.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
 xen/arch/x86/boot/x86_64.S | 13 +++++++++++++
 xen/arch/x86/setup.c       | 21 ++++++++++++---------
 xen/arch/x86/smpboot.c     |  4 +++-
 3 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index 925fd4b..b1f0457 100644
--- a/xen/arch/x86/boot/x86_64.S
+++ b/xen/arch/x86/boot/x86_64.S
@@ -15,6 +15,19 @@ ENTRY(__high_start)
         mov     $XEN_MINIMAL_CR4,%rcx
         mov     %rcx,%cr4
 
+        /* Set up %cr3 (differs between BSP and APs). */
+        test    %ebx, %ebx
+        jz      .Lbsp_setup
+
+        /* APs switch onto percpu_idle_pt[], as provided by do_boot_cpu(). */
+        mov     ap_cr3(%rip), %rax
+        mov     %rax, %cr3
+        jmp     .Ldone
+
+.Lbsp_setup:
+        /* The BSP stays on the idle_pg_table[] during early boot. */
+.Ldone:
+
         mov     stack_start(%rip),%rsp
         or      $(STACK_SIZE-CPUINFO_sizeof),%rsp
 
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 39d1592..d624b95 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -241,7 +241,6 @@ void early_switch_to_idle(bool bsp)
 {
     unsigned int cpu = smp_processor_id();
     struct vcpu *v = idle_vcpu[cpu];
-    unsigned long cr4 = read_cr4();
 
     /*
      * VT-x hardwires the GDT and IDT limit at 0xffff on VMExit.
@@ -264,14 +263,6 @@ void early_switch_to_idle(bool bsp)
     per_cpu(curr_vcpu, cpu) = v;
 
     __set_bit(_PGC_inuse_pgtable, &maddr_to_page(v->arch.cr3)->count_info);
-    asm volatile ( "mov %[npge], %%cr4;"
-                   "mov %[cr3], %%cr3;"
-                   "mov %[pge], %%cr4;"
-                   ::
-                    [npge] "r" (cr4 & ~X86_CR4_PGE),
-                    [cr3]  "r" (v->arch.cr3),
-                    [pge]  "r" (cr4)
-                   : "memory" );
 
     per_cpu(curr_ptbase, cpu) = v->arch.cr3;
     per_cpu(curr_extended_directmap, cpu) = true;
@@ -286,7 +277,19 @@ void early_switch_to_idle(bool bsp)
 
 static void __init init_idle_domain(void)
 {
+    unsigned long cr4 = read_cr4();
+
     scheduler_init();
+
+    asm volatile ( "mov %[npge], %%cr4;"
+                   "mov %[cr3], %%cr3;"
+                   "mov %[pge], %%cr4;"
+                   ::
+                    [npge] "r" (cr4 & ~X86_CR4_PGE),
+                    [cr3]  "r" (idle_vcpu[0]->arch.cr3),
+                    [pge]  "r" (cr4)
+                   : "memory" );
+
     early_switch_to_idle(true);
 }
 
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index 1bf6dc1..f785d5f 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -309,7 +309,6 @@ void start_secondary(void *unused)
     /* Critical region without IDT or TSS.  Any fault is deadly! */
 
     set_processor_id(cpu);
-    get_cpu_info()->cr4 = XEN_MINIMAL_CR4;
 
     early_switch_to_idle(false);
 
@@ -385,6 +384,8 @@ void start_secondary(void *unused)
     startup_cpu_idle_loop();
 }
 
+/* Used to pass percpu_idle_pt to the booting AP. */
+paddr_t ap_cr3;
 extern void *stack_start;
 
 static int wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
@@ -527,6 +528,7 @@ static int do_boot_cpu(int apicid, int cpu)
         printk("Booting processor %d/%d eip %lx\n",
                cpu, apicid, start_eip);
 
+    ap_cr3 = per_cpu(percpu_idle_pt, cpu);
     stack_start = stack_base[cpu];
 
     /* This grunge runs the startup process for the targeted processor. */
-- 
2.1.4


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