[PATCH RESEND v1 0/7] Intel Processor Trace virtulization enabling

[Luwei Kang <luwei.kang@intel.com>]

Hi All,

Here is a patch-series which adding Processor Trace enabling in XEN guest. You can get It's software developer manuals from:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
In Chapter 5 INTEL PROCESSOR TRACE: VMX IMPROVEMENTS.

Introduction:
Intel Processor Trace (Intel PT) is an extension of Intel Architecture that captures information about software execution using dedicated hardware facilities that cause only minimal performance perturbation to the software being traced. Details on the Intel PT infrastructure and trace capabilities can be found in the Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3C.

The suite of architecture changes serve to simplify the process of virtualizing Intel PT for use by a guest software. There are two primary elements to this new architecture support for VMX support improvements made for Intel PT.
1. Addition of a new guest IA32_RTIT_CTL value field to the VMCS.
  — This serves to speed and simplify the process of disabling trace on VM exit, and restoring it on VM entry.
2. Enabling use of EPT to redirect PT output.
  — This enables the VMM to elect to virtualize the PT output buffer using EPT. In this mode, the CPU will treat PT output addresses as Guest Physical Addresses (GPAs) and translate them using EPT. This means that Intel PT output reads (of the ToPA table) and writes (of trace output) can cause EPT violations, and other output events.

=======
Do some optimization in context switch compared with the first sent:
1. disable intercept only when PT is enabled in guest;
2. disable Intel PT and enable intercept MSRs when L1 guest VMXON;


Luwei Kang (7):
  x86: add a flag to enable Intel processor trace
  x86: configure vmcs for Intel processor trace virtualization
  x86: add intel proecessor trace support for cpuid
  x86: add intel processor trace context
  x86: Implement Intel Processor Trace context switch
  x86: Implement Intel Processor Trace MSRs read/write
  x86: Disable Intel Processor Trace when VMXON in L1 guest

 docs/misc/xen-command-line.markdown         |   7 +
 tools/libxc/xc_cpuid_x86.c                  |  12 +-
 xen/arch/x86/cpu/Makefile                   |   1 +
 xen/arch/x86/cpu/intel_pt.c                 | 197 ++++++++++++++++++++++++++++
 xen/arch/x86/cpuid.c                        |  22 ++++
 xen/arch/x86/domctl.c                       |   4 +
 xen/arch/x86/hvm/vmx/vmcs.c                 |  36 ++++-
 xen/arch/x86/hvm/vmx/vmx.c                  |  22 ++++
 xen/arch/x86/hvm/vmx/vvmx.c                 |   7 +-
 xen/include/asm-x86/cpufeature.h            |   1 +
 xen/include/asm-x86/cpuid.h                 |  12 +-
 xen/include/asm-x86/hvm/vmx/vmcs.h          |  12 ++
 xen/include/asm-x86/intel_pt.h              |  51 +++++++
 xen/include/asm-x86/msr-index.h             |  20 +++
 xen/include/public/arch-x86/cpufeatureset.h |   1 +
 15 files changed, 395 insertions(+), 10 deletions(-)
 create mode 100644 xen/arch/x86/cpu/intel_pt.c
 create mode 100644 xen/include/asm-x86/intel_pt.h

-- 
1.8.3.1


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