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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xen.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Wei Liu" <wei.liu2@citrix.com>,
	"Jan Beulich" <JBeulich@suse.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: [PATCH 3/6] x86/pat: Simplify host PAT handling
Date: Mon, 28 May 2018 15:27:55 +0100	[thread overview]
Message-ID: <1527517678-1779-4-git-send-email-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <1527517678-1779-1-git-send-email-andrew.cooper3@citrix.com>

With the removal of the 32bit hypervisor build, host_pat is a constant value.
Drop the variable and the redundant cpu_has_pat predicate, and use a define
instead.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
---
 xen/arch/x86/acpi/suspend.c      | 3 +--
 xen/arch/x86/cpu/common.c        | 9 +--------
 xen/arch/x86/hvm/mtrr.c          | 2 +-
 xen/include/asm-x86/cpufeature.h | 1 -
 xen/include/asm-x86/processor.h  | 7 ++++++-
 5 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/acpi/suspend.c b/xen/arch/x86/acpi/suspend.c
index 044bd81..eecf357 100644
--- a/xen/arch/x86/acpi/suspend.c
+++ b/xen/arch/x86/acpi/suspend.c
@@ -95,8 +95,7 @@ void restore_rest_processor_state(void)
     /* Reload FPU state on next FPU use. */
     stts();
 
-    if (cpu_has_pat)
-        wrmsrl(MSR_IA32_CR_PAT, host_pat);
+    wrmsrl(MSR_IA32_CR_PAT, XEN_MSR_PAT);
 
     mtrr_bp_restore();
 }
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 528aff1..3548b12 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -47,12 +47,6 @@ unsigned int paddr_bits __read_mostly = 36;
 unsigned int hap_paddr_bits __read_mostly = 36;
 unsigned int vaddr_bits __read_mostly = VADDR_BITS;
 
-/*
- * Default host IA32_CR_PAT value to cover all memory types.
- * BIOS usually sets it to 0x07040600070406.
- */
-u64 host_pat = 0x050100070406;
-
 static unsigned int cleared_caps[NCAPINTS];
 static unsigned int forced_caps[NCAPINTS];
 
@@ -814,8 +808,7 @@ void cpu_init(void)
 	if (opt_cpu_info)
 		printk("Initializing CPU#%d\n", cpu);
 
-	if (cpu_has_pat)
-		wrmsrl(MSR_IA32_CR_PAT, host_pat);
+	wrmsrl(MSR_IA32_CR_PAT, XEN_MSR_PAT);
 
 	/* Install correct page table. */
 	write_ptbase(current);
diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c
index a61cc1e..c78e5c1 100644
--- a/xen/arch/x86/hvm/mtrr.c
+++ b/xen/arch/x86/hvm/mtrr.c
@@ -125,7 +125,7 @@ static int __init hvm_mtrr_pat_init(void)
     {
         for ( j = 0; j < PAT_TYPE_NUMS; j++ )
         {
-            if ( pat_cr_2_paf(host_pat, j) == i )
+            if ( pat_cr_2_paf(XEN_MSR_PAT, j) == i )
             {
                 pat_entry_tbl[i] = j;
                 break;
diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h
index b237da1..4bc6c91 100644
--- a/xen/include/asm-x86/cpufeature.h
+++ b/xen/include/asm-x86/cpufeature.h
@@ -37,7 +37,6 @@
 #define cpu_has_sep             boot_cpu_has(X86_FEATURE_SEP)
 #define cpu_has_mtrr            1
 #define cpu_has_pge             1
-#define cpu_has_pat             1
 #define cpu_has_pse36           boot_cpu_has(X86_FEATURE_PSE36)
 #define cpu_has_clflush         boot_cpu_has(X86_FEATURE_CLFLUSH)
 #define cpu_has_mmx             1
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index 9924cdf..ac1577c 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -97,6 +97,12 @@
                           X86_EFLAGS_NT|X86_EFLAGS_DF|X86_EFLAGS_IF|    \
                           X86_EFLAGS_TF)
 
+/*
+ * Host IA32_CR_PAT value to cover all memory types.  This is not the default
+ * MSR_PAT value, and is an ABI with PV guests.
+ */
+#define XEN_MSR_PAT 0x050100070406ul
+
 #ifndef __ASSEMBLY__
 
 struct domain;
@@ -145,7 +151,6 @@ extern bool probe_cpuid_faulting(void);
 extern void ctxt_switch_levelling(const struct vcpu *next);
 extern void (*ctxt_switch_masking)(const struct vcpu *next);
 
-extern u64 host_pat;
 extern bool_t opt_cpu_info;
 extern u32 cpuid_ext_features;
 extern u64 trampoline_misc_enable_off;
-- 
2.1.4


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  parent reply	other threads:[~2018-05-28 14:27 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-28 14:27 [PATCH 0/6] x86/vmx: Misc fixes and improvements Andrew Cooper
2018-05-28 14:27 ` [PATCH 1/6] x86/vmx: Fix handing of MSR_DEBUGCTL on VMExit Andrew Cooper
2018-05-29 10:33   ` Jan Beulich
2018-05-29 18:08     ` Andrew Cooper
2018-05-30  7:32       ` Jan Beulich
2018-05-30 10:28         ` Andrew Cooper
2018-05-30 10:49           ` Jan Beulich
2018-05-30 17:34   ` [PATCH v2 " Andrew Cooper
2018-06-01  9:28     ` Jan Beulich
2018-06-05  7:54     ` Tian, Kevin
2018-05-28 14:27 ` [PATCH 2/6] x86: Improvements to ler debugging Andrew Cooper
2018-05-29 11:39   ` Jan Beulich
2018-05-29 18:09     ` Andrew Cooper
2018-06-05  7:55   ` Tian, Kevin
2018-05-28 14:27 ` Andrew Cooper [this message]
2018-05-29 11:40   ` [PATCH 3/6] x86/pat: Simplify host PAT handling Jan Beulich
2018-06-06  9:39   ` Roger Pau Monné
2018-05-28 14:27 ` [PATCH 4/6] x86/vmx: Simplify PAT handling during vcpu construction Andrew Cooper
2018-05-29 11:41   ` Jan Beulich
2018-06-05  7:57   ` Tian, Kevin
2018-06-06  9:42   ` Roger Pau Monné
2018-05-28 14:27 ` [PATCH 5/6] x86/vmx: Defer vmx_vmcs_exit() as long as possible in construct_vmcs() Andrew Cooper
2018-05-29 11:43   ` Jan Beulich
2018-06-05  8:00   ` Tian, Kevin
2018-06-06  9:45   ` Roger Pau Monné
2018-06-06 10:11     ` Andrew Cooper
2018-05-28 14:27 ` [PATCH 6/6] x86/vmx: Drop VMX signal for full real-mode Andrew Cooper
2018-06-05  8:01   ` Tian, Kevin
2018-06-06 10:03   ` Roger Pau Monné

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