From: Andrii Anisov <andrii.anisov@gmail.com>
To: Stefano Stabellini <sstabellini@kernel.org>,
Julien Grall <julien.grall@arm.com>
Cc: nd@arm.com, andrii_anisov@epam.com,
Milan Boberic <milanboberic94@gmail.com>,
Dario Faggioli <dfaggioli@suse.com>,
Julien Grall <julien.grall@gmail.com>,
Meng Xu <xumengpanda@gmail.com>,
xen-devel@lists.xenproject.org,
Stefano Stabellini <stefano.stabellini@xilinx.com>
Subject: Re: Xen optimization
Date: Wed, 12 Dec 2018 12:41:27 +0200 [thread overview]
Message-ID: <170fd802-8c8c-afb8-fc5a-5445f7cc135e@gmail.com> (raw)
In-Reply-To: <b5b458f6-9771-1269-7aa7-f9b7677277f7@gmail.com>
On 12.12.18 11:46, Andrii Anisov wrote:
> Digging into that now.
I got it. My u-boot starts TBM in hyp mode. But them both miss setting HCR_EL2.IMO, so no interrupt exception was taken in hyp.
OK, for my baremetal TBM in hyp, numbers are:
max=840 warm_max=120 min=120 avg=127
I guess, warm_max and min are one tick of the system timer. And it seems to me that one tick of the system timer is the lower limit of the irq latency by HW design.
--
Sincerely,
Andrii Anisov.
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next prev parent reply other threads:[~2018-12-12 10:41 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-09 10:59 Xen optimization Milan Boberic
2018-10-09 16:46 ` Dario Faggioli
2018-10-10 11:22 ` Milan Boberic
2018-10-10 11:25 ` Milan Boberic
2018-10-10 16:41 ` Meng Xu
2018-10-11 7:36 ` Milan Boberic
2018-10-11 12:17 ` Milan Boberic
2018-10-11 17:05 ` Dario Faggioli
2018-10-11 15:39 ` Meng Xu
2018-10-11 22:29 ` Stefano Stabellini
2018-10-12 15:33 ` Milan Boberic
2018-10-12 16:36 ` Julien Grall
2018-10-12 17:43 ` Stefano Stabellini
2018-10-13 16:01 ` Milan Boberic
2018-10-14 22:46 ` Stefano Stabellini
2018-10-15 12:27 ` Milan Boberic
2018-10-16 7:13 ` Stefano Stabellini
2018-10-15 8:14 ` Julien Grall
2018-10-15 12:50 ` Julien Grall
2018-10-15 13:01 ` Milan Boberic
2018-10-15 13:03 ` Julien Grall
2018-10-17 15:19 ` Milan Boberic
2018-10-19 21:02 ` Stefano Stabellini
2018-10-19 22:41 ` Dario Faggioli
2018-10-22 15:02 ` Milan Boberic
2018-10-22 17:52 ` Stefano Stabellini
2018-10-23 8:58 ` Milan Boberic
2018-10-24 0:24 ` Stefano Stabellini
2018-10-25 10:09 ` Milan Boberic
2018-10-25 11:30 ` Julien Grall
2018-10-25 12:36 ` Milan Boberic
2018-10-25 13:44 ` Dario Faggioli
2018-10-25 14:00 ` Julien Grall
2018-10-25 14:04 ` Julien Grall
2018-10-25 14:47 ` Milan Boberic
2018-10-25 14:51 ` Julien Grall
2018-10-25 16:18 ` Xen optimizationcy Stefano Stabellini
2018-10-25 11:09 ` Xen optimization Julien Grall
2018-10-25 16:15 ` Stefano Stabellini
2018-10-26 19:12 ` Julien Grall
2018-10-26 20:41 ` Stefano Stabellini
2018-10-29 12:29 ` Milan Boberic
2018-10-31 18:59 ` Julien Grall
2018-10-31 20:35 ` Milan Boberic
2018-10-31 21:16 ` Julien Grall
2018-11-01 20:20 ` Stefano Stabellini
2018-11-01 20:35 ` Julien Grall
2018-11-20 11:33 ` Andrii Anisov
2018-11-27 21:27 ` Stefano Stabellini
2018-11-29 8:19 ` Andrii Anisov
2018-12-10 10:58 ` Andrii Anisov
2018-12-10 11:54 ` Julien Grall
2018-12-10 12:23 ` Andrii Anisov
2018-12-11 12:27 ` Julien Grall
2018-12-11 16:56 ` Dario Faggioli
2018-12-12 9:39 ` Andrii Anisov
2018-12-12 17:10 ` Dario Faggioli
2018-12-12 17:32 ` Andrii Anisov
2018-12-12 17:59 ` Dario Faggioli
2018-12-13 7:48 ` Andrii Anisov
2018-12-11 18:39 ` Stefano Stabellini
2018-12-11 19:05 ` Julien Grall
2018-12-11 19:29 ` Stefano Stabellini
2018-12-12 9:46 ` Andrii Anisov
2018-12-12 10:41 ` Andrii Anisov [this message]
2018-12-12 17:39 ` Stefano Stabellini
2018-12-12 17:47 ` Andrii Anisov
2018-12-12 18:01 ` Stefano Stabellini
2018-12-12 9:34 ` Andrii Anisov
2018-11-07 13:14 ` Julien Grall
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