From: Andre Przywara <andre.przywara@arm.com>
To: Julien Grall <julien.grall@arm.com>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
Vijay Kilari <vijay.kilari@gmail.com>,
Shanker Donthineni <shankerd@codeaurora.org>
Subject: Re: [PATCH v8 07/27] ARM: vGICv3: handle virtual LPI pending and property tables
Date: Wed, 12 Apr 2017 14:12:10 +0100 [thread overview]
Message-ID: <184ffd90-6cd4-e6ea-ac5b-b1d2556dba02@arm.com> (raw)
In-Reply-To: <22389218-452b-75a0-e13e-894ed315bb4a@arm.com>
Hi,
On 12/04/17 11:55, Julien Grall wrote:
> Hi Andre,
>
> On 12/04/17 01:44, Andre Przywara wrote:
>> Allow a guest to provide the address and size for the memory regions
>> it has reserved for the GICv3 pending and property tables.
>> We sanitise the various fields of the respective redistributor
>> registers.
>> The MMIO read and write accesses are protected by locks, to avoid any
>> changing of the property or pending table address while a redistributor
>> is live and also to protect the non-atomic vgic_reg64_extract() function
>> on the MMIO read side.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> Reviewed-by: Julien Grall <julien.grall@arm.com>
>
> Whilst I gave my reviewed-by it is very rude to ignore a comment.
Yeah, sorry about that! I was unsure about that as well, so thought
about it and eventually forgot to answer.
> It would have been nicer to answer even if it is just saying "I can add
> a TODO and address it in a follow-up patch".
>
> Please get use to mention all the changes (e.g the spin_*lock ->
> spin_*lock_irq* change) you made in a patch. Mainly if you keep a
> reviewed-by.
I was really unsure about keeping or dropping it, but since you
complained about me dropping it last time I tried it the other way this
time ;-)
>> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
>> index ebaea35..b2d98bb 100644
>> --- a/xen/include/asm-arm/domain.h
>> +++ b/xen/include/asm-arm/domain.h
>> @@ -109,11 +109,15 @@ struct arch_domain
>> } *rdist_regions;
>> int nr_regions; /* Number of rdist
>> regions */
>> uint32_t rdist_stride; /* Re-Distributor stride */
>> + unsigned long int nr_lpis;
>> + uint64_t rdist_propbase;
>> struct rb_root its_devices; /* Devices mapped to an
>> ITS */
>> spinlock_t its_devices_lock; /* Protects the
>> its_devices tree */
>> struct radix_tree_root pend_lpi_tree; /* Stores struct
>> pending_irq's */
>> rwlock_t pend_lpi_tree_lock; /* Protects the
>> pend_lpi_tree */
>> unsigned int intid_bits;
>> + bool rdists_enabled; /* Is any redistributor
>> enabled? */
>> + bool has_its;
>
> The comment you ignore was the one about consolidating rdists_enabled
> and has_its in a single field and use flags.
Yes, I had the idea myself before, but decided against it as IMHO it
looks much nicer this way (compared to using a flags variable. which I
guess is what you mean).
Are you OK with that?
Cheers,
Andre.
>
>> #endif
>> } vgic;
>>
>> @@ -260,6 +264,7 @@ struct arch_vcpu
>>
>> /* GICv3: redistributor base and flags for this vCPU */
>> paddr_t rdist_base;
>> + uint64_t rdist_pendbase;
>> #define VGIC_V3_RDIST_LAST (1 << 0) /* last vCPU of the
>> rdist */
>> #define VGIC_V3_LPIS_ENABLED (1 << 1)
>> uint8_t flags;
>>
>
> Cheers,
>
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next prev parent reply other threads:[~2017-04-12 13:10 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-12 0:44 [PATCH v8 00/27] arm64: Dom0 ITS emulation Andre Przywara
2017-04-12 0:44 ` [PATCH v8 01/27] ARM: GICv3: propagate number of host LPIs to GICv3 guest Andre Przywara
2017-04-12 10:06 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 02/27] ARM: VGIC: move irq_to_pending() calls under the VGIC VCPU lock Andre Przywara
2017-04-12 10:13 ` Julien Grall
2017-04-12 11:38 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 03/27] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-04-12 10:25 ` Julien Grall
2017-04-12 14:51 ` Andre Przywara
2017-04-12 14:52 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 04/27] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-04-12 10:35 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 05/27] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-04-12 10:44 ` Julien Grall
2017-04-12 17:26 ` Andre Przywara
2017-05-10 10:47 ` Andre Przywara
2017-05-10 11:07 ` Julien Grall
2017-05-10 17:14 ` Andre Przywara
2017-05-10 17:17 ` Julien Grall
2017-05-11 17:55 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 06/27] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-04-12 0:44 ` [PATCH v8 07/27] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-04-12 10:55 ` Julien Grall
2017-04-12 13:12 ` Andre Przywara [this message]
2017-04-12 13:13 ` Julien Grall
2017-05-11 17:54 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 08/27] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-04-12 12:29 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 09/27] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-04-12 0:44 ` [PATCH v8 10/27] ARM: GIC: export vgic_init_pending_irq() Andre Przywara
2017-04-12 0:44 ` [PATCH v8 11/27] ARM: VGIC: add vcpu_id to struct pending_irq Andre Przywara
2017-04-12 12:32 ` Julien Grall
2017-04-12 12:37 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 12/27] ARM: vGIC: advertise LPI support Andre Przywara
2017-04-12 12:38 ` Julien Grall
2017-04-12 12:48 ` Andre Przywara
2017-04-12 13:04 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 13/27] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-04-12 12:59 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 14/27] ARM: vITS: introduce translation table walks Andre Przywara
2017-04-12 13:22 ` Julien Grall
2017-04-12 13:36 ` Andre Przywara
2017-04-12 13:37 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 15/27] ARM: vITS: handle CLEAR command Andre Przywara
2017-04-12 14:10 ` Julien Grall
2017-04-12 14:29 ` Andre Przywara
2017-04-12 14:49 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 16/27] ARM: vITS: handle INT command Andre Przywara
2017-04-12 14:50 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 17/27] ARM: vITS: handle MAPC command Andre Przywara
2017-04-12 14:51 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 18/27] ARM: vITS: handle MAPD command Andre Przywara
2017-04-12 15:21 ` Julien Grall
2017-04-12 17:03 ` Andre Przywara
2017-04-12 17:05 ` Julien Grall
2017-04-12 17:24 ` Andrew Cooper
2017-04-12 18:18 ` Wei Liu
2017-05-10 10:42 ` Andre Przywara
2017-05-10 11:30 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 19/27] ARM: vITS: handle MAPTI command Andre Przywara
2017-04-12 16:18 ` Julien Grall
2017-04-12 16:27 ` Andre Przywara
2017-04-12 17:16 ` Julien Grall
2017-04-12 17:25 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 20/27] ARM: GICv3: handle unmapped LPIs Andre Przywara
2017-04-12 9:46 ` Andre Przywara
2017-04-12 16:49 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 21/27] ARM: vITS: handle MOVI command Andre Przywara
2017-04-12 16:59 ` Julien Grall
2017-05-10 10:34 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 22/27] ARM: vITS: handle DISCARD command Andre Przywara
2017-04-12 17:06 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 23/27] ARM: vITS: handle INV command Andre Przywara
2017-04-12 17:20 ` Julien Grall
2017-05-10 15:11 ` Andre Przywara
2017-05-11 10:43 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 24/27] ARM: vITS: handle INVALL command Andre Przywara
2017-04-12 17:26 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 25/27] ARM: vITS: increase mmio_count for each ITS Andre Przywara
2017-04-12 0:44 ` [PATCH v8 26/27] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-04-12 0:44 ` [PATCH v8 27/27] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-04-12 14:13 ` [PATCH v8 00/27] arm64: Dom0 ITS emulation Julien Grall
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